Lines Matching refs:channel
60 .channel = BCM_SR_GENPLL0_125M_CLK,
66 .channel = BCM_SR_GENPLL0_SCR_CLK,
72 .channel = BCM_SR_GENPLL0_250M_CLK,
78 .channel = BCM_SR_GENPLL0_PCIE_AXI_CLK,
84 .channel = BCM_SR_GENPLL0_PAXC_AXI_X2_CLK,
90 .channel = BCM_SR_GENPLL0_PAXC_AXI_CLK,
120 .channel = BCM_SR_GENPLL2_NIC_CLK,
126 .channel = BCM_SR_GENPLL2_TS_500_CLK,
132 .channel = BCM_SR_GENPLL2_125_NITRO_CLK,
138 .channel = BCM_SR_GENPLL2_CHIMP_CLK,
144 .channel = BCM_SR_GENPLL2_NIC_FLASH_CLK,
150 .channel = BCM_SR_GENPLL2_FS4_CLK,
179 .channel = BCM_SR_GENPLL3_HSLS_CLK,
185 .channel = BCM_SR_GENPLL3_SDIO_CLK,
214 .channel = BCM_SR_GENPLL4_CCN_CLK,
220 .channel = BCM_SR_GENPLL4_TPIU_PLL_CLK,
226 .channel = BCM_SR_GENPLL4_NOC_CLK,
232 .channel = BCM_SR_GENPLL4_CHCLK_FS4_CLK,
238 .channel = BCM_SR_GENPLL4_BRIDGE_FSCPU_CLK,
268 .channel = BCM_SR_GENPLL5_FS4_HF_CLK,
273 .channel = BCM_SR_GENPLL5_CRYPTO_AE_CLK,
278 .channel = BCM_SR_GENPLL5_RAID_AE_CLK,
304 .channel = BCM_SR_LCPLL0_SATA_REFP_CLK,
310 .channel = BCM_SR_LCPLL0_SATA_REFN_CLK,
316 .channel = BCM_SR_LCPLL0_SATA_350_CLK,
322 .channel = BCM_SR_LCPLL0_SATA_500_CLK,
349 .channel = BCM_SR_LCPLL1_WAN_CLK,
355 .channel = BCM_SR_LCPLL1_USB_REF_CLK,
361 .channel = BCM_SR_LCPLL1_CRMU_TS_CLK,
388 .channel = BCM_SR_LCPLL_PCIE_PHY_REF_CLK,