Lines Matching refs:pdiv
67 u16 pdiv; /* 1..127 for Y2-Y9; 1..1023 for Y1 */ member
288 static void cdce925_clk_set_pdiv(struct clk_cdce925_output *data, u16 pdiv) in cdce925_clk_set_pdiv() argument
294 0x03, (pdiv >> 8) & 0x03); in cdce925_clk_set_pdiv()
295 regmap_write(data->chip->regmap, 0x03, pdiv & 0xFF); in cdce925_clk_set_pdiv()
298 regmap_update_bits(data->chip->regmap, 0x16, 0x7F, pdiv); in cdce925_clk_set_pdiv()
301 regmap_update_bits(data->chip->regmap, 0x17, 0x7F, pdiv); in cdce925_clk_set_pdiv()
304 regmap_update_bits(data->chip->regmap, 0x26, 0x7F, pdiv); in cdce925_clk_set_pdiv()
307 regmap_update_bits(data->chip->regmap, 0x27, 0x7F, pdiv); in cdce925_clk_set_pdiv()
310 regmap_update_bits(data->chip->regmap, 0x36, 0x7F, pdiv); in cdce925_clk_set_pdiv()
313 regmap_update_bits(data->chip->regmap, 0x37, 0x7F, pdiv); in cdce925_clk_set_pdiv()
316 regmap_update_bits(data->chip->regmap, 0x46, 0x7F, pdiv); in cdce925_clk_set_pdiv()
319 regmap_update_bits(data->chip->regmap, 0x47, 0x7F, pdiv); in cdce925_clk_set_pdiv()
354 cdce925_clk_set_pdiv(data, data->pdiv); in cdce925_clk_prepare()
372 if (data->pdiv) in cdce925_clk_recalc_rate()
373 return parent_rate / data->pdiv; in cdce925_clk_recalc_rate()
459 data->pdiv = cdce925_calc_divider(rate, parent_rate); in cdce925_clk_set_rate()
506 data->pdiv = cdce925_y1_calc_divider(rate, parent_rate); in cdce925_clk_y1_set_rate()
717 data->clk[0].pdiv = 1; in cdce925_probe()
735 data->clk[i].pdiv = 1; in cdce925_probe()