Lines Matching refs:divider_reg
445 void __iomem *divider_reg; /* CSR for divider */ member
554 if (pclk->param.divider_reg) { in xgene_clk_recalc_rate()
555 data = xgene_clk_read(pclk->param.divider_reg + in xgene_clk_recalc_rate()
584 if (pclk->param.divider_reg) { in xgene_clk_set_rate()
593 data = xgene_clk_read(pclk->param.divider_reg + in xgene_clk_set_rate()
598 xgene_clk_write(data, pclk->param.divider_reg + in xgene_clk_set_rate()
619 if (pclk->param.divider_reg) { in xgene_clk_round_rate()
696 parameters.divider_reg = NULL; in xgene_devclk_init()
713 parameters.divider_reg = map_res; in xgene_devclk_init()
751 if (parameters.divider_reg) in xgene_devclk_init()
752 iounmap(parameters.divider_reg); in xgene_devclk_init()