Lines Matching refs:corediv

82 	struct clk_corediv *corediv = to_corediv_clk(hwclk);  in clk_corediv_is_enabled()  local
83 const struct clk_corediv_soc_desc *soc_desc = corediv->soc_desc; in clk_corediv_is_enabled()
84 const struct clk_corediv_desc *desc = corediv->desc; in clk_corediv_is_enabled()
87 return !!(readl(corediv->reg) & enable_mask); in clk_corediv_is_enabled()
92 struct clk_corediv *corediv = to_corediv_clk(hwclk); in clk_corediv_enable() local
93 const struct clk_corediv_soc_desc *soc_desc = corediv->soc_desc; in clk_corediv_enable()
94 const struct clk_corediv_desc *desc = corediv->desc; in clk_corediv_enable()
98 spin_lock_irqsave(&corediv->lock, flags); in clk_corediv_enable()
100 reg = readl(corediv->reg); in clk_corediv_enable()
102 writel(reg, corediv->reg); in clk_corediv_enable()
104 spin_unlock_irqrestore(&corediv->lock, flags); in clk_corediv_enable()
111 struct clk_corediv *corediv = to_corediv_clk(hwclk); in clk_corediv_disable() local
112 const struct clk_corediv_soc_desc *soc_desc = corediv->soc_desc; in clk_corediv_disable()
113 const struct clk_corediv_desc *desc = corediv->desc; in clk_corediv_disable()
117 spin_lock_irqsave(&corediv->lock, flags); in clk_corediv_disable()
119 reg = readl(corediv->reg); in clk_corediv_disable()
121 writel(reg, corediv->reg); in clk_corediv_disable()
123 spin_unlock_irqrestore(&corediv->lock, flags); in clk_corediv_disable()
129 struct clk_corediv *corediv = to_corediv_clk(hwclk); in clk_corediv_recalc_rate() local
130 const struct clk_corediv_soc_desc *soc_desc = corediv->soc_desc; in clk_corediv_recalc_rate()
131 const struct clk_corediv_desc *desc = corediv->desc; in clk_corediv_recalc_rate()
134 reg = readl(corediv->reg + soc_desc->ratio_offset); in clk_corediv_recalc_rate()
157 struct clk_corediv *corediv = to_corediv_clk(hwclk); in clk_corediv_set_rate() local
158 const struct clk_corediv_soc_desc *soc_desc = corediv->soc_desc; in clk_corediv_set_rate()
159 const struct clk_corediv_desc *desc = corediv->desc; in clk_corediv_set_rate()
165 spin_lock_irqsave(&corediv->lock, flags); in clk_corediv_set_rate()
168 reg = readl(corediv->reg + soc_desc->ratio_offset); in clk_corediv_set_rate()
171 writel(reg, corediv->reg + soc_desc->ratio_offset); in clk_corediv_set_rate()
174 reg = readl(corediv->reg) | BIT(desc->fieldbit); in clk_corediv_set_rate()
175 writel(reg, corediv->reg); in clk_corediv_set_rate()
178 reg = readl(corediv->reg) | soc_desc->ratio_reload; in clk_corediv_set_rate()
179 writel(reg, corediv->reg); in clk_corediv_set_rate()
187 writel(reg, corediv->reg); in clk_corediv_set_rate()
190 spin_unlock_irqrestore(&corediv->lock, flags); in clk_corediv_set_rate()
256 struct clk_corediv *corediv; in mvebu_corediv_clk_init() local
277 corediv = kcalloc(clk_data.clk_num, sizeof(struct clk_corediv), in mvebu_corediv_clk_init()
279 if (WARN_ON(!corediv)) in mvebu_corediv_clk_init()
282 spin_lock_init(&corediv->lock); in mvebu_corediv_clk_init()
293 corediv[i].soc_desc = soc_desc; in mvebu_corediv_clk_init()
294 corediv[i].desc = soc_desc->descs + i; in mvebu_corediv_clk_init()
295 corediv[i].reg = base; in mvebu_corediv_clk_init()
296 corediv[i].hw.init = &init; in mvebu_corediv_clk_init()
298 clks[i] = clk_register(NULL, &corediv[i].hw); in mvebu_corediv_clk_init()