59 	const struct clk_corediv_soc_desc *soc_desc;  member
83 	const struct clk_corediv_soc_desc *soc_desc = corediv->soc_desc;  in clk_corediv_is_enabled()  local
85 	u32 enable_mask = BIT(desc->fieldbit) << soc_desc->enable_bit_offset;  in clk_corediv_is_enabled()
93 	const struct clk_corediv_soc_desc *soc_desc = corediv->soc_desc;  in clk_corediv_enable()  local
101 	reg |= (BIT(desc->fieldbit) << soc_desc->enable_bit_offset);  in clk_corediv_enable()
112 	const struct clk_corediv_soc_desc *soc_desc = corediv->soc_desc;  in clk_corediv_disable()  local
120 	reg &= ~(BIT(desc->fieldbit) << soc_desc->enable_bit_offset);  in clk_corediv_disable()
130 	const struct clk_corediv_soc_desc *soc_desc = corediv->soc_desc;  in clk_corediv_recalc_rate()  local
134 	reg = readl(corediv->reg + soc_desc->ratio_offset);  in clk_corediv_recalc_rate()
158 	const struct clk_corediv_soc_desc *soc_desc = corediv->soc_desc;  in clk_corediv_set_rate()  local
168 	reg = readl(corediv->reg + soc_desc->ratio_offset);  in clk_corediv_set_rate()
171 	writel(reg, corediv->reg + soc_desc->ratio_offset);  in clk_corediv_set_rate()
178 	reg = readl(corediv->reg) | soc_desc->ratio_reload;  in clk_corediv_set_rate()
186 	reg &= ~(CORE_CLK_DIV_RATIO_MASK | soc_desc->ratio_reload);  in clk_corediv_set_rate()
253 		       const struct clk_corediv_soc_desc *soc_desc)  in mvebu_corediv_clk_init()  argument
269 	clk_data.clk_num = soc_desc->ndescs;  in mvebu_corediv_clk_init()
290 		init.ops = &soc_desc->ops;  in mvebu_corediv_clk_init()
293 		corediv[i].soc_desc = soc_desc;  in mvebu_corediv_clk_init()
294 		corediv[i].desc = soc_desc->descs + i;  in mvebu_corediv_clk_init()