Lines Matching refs:clkr
130 struct clk_alpha_pll, clkr)
133 struct clk_alpha_pll_postdiv, clkr)
141 const char *name = clk_hw_get_name(&pll->clkr.hw); in wait_for_pll()
143 ret = regmap_read(pll->clkr.regmap, PLL_MODE(pll), &val); in wait_for_pll()
148 ret = regmap_read(pll->clkr.regmap, PLL_MODE(pll), &val); in wait_for_pll()
230 ret = regmap_read(pll->clkr.regmap, PLL_MODE(pll), &val); in clk_alpha_pll_hwfsm_enable()
239 ret = regmap_write(pll->clkr.regmap, PLL_MODE(pll), val); in clk_alpha_pll_hwfsm_enable()
255 ret = regmap_read(pll->clkr.regmap, PLL_MODE(pll), &val); in clk_alpha_pll_hwfsm_disable()
260 ret = regmap_update_bits(pll->clkr.regmap, PLL_MODE(pll), in clk_alpha_pll_hwfsm_disable()
271 ret = regmap_update_bits(pll->clkr.regmap, PLL_MODE(pll), in clk_alpha_pll_hwfsm_disable()
285 ret = regmap_read(pll->clkr.regmap, PLL_MODE(pll), &val); in pll_is_enabled()
309 ret = regmap_read(pll->clkr.regmap, PLL_MODE(pll), &val); in clk_alpha_pll_enable()
325 ret = regmap_update_bits(pll->clkr.regmap, PLL_MODE(pll), in clk_alpha_pll_enable()
337 ret = regmap_update_bits(pll->clkr.regmap, PLL_MODE(pll), in clk_alpha_pll_enable()
346 ret = regmap_update_bits(pll->clkr.regmap, PLL_MODE(pll), in clk_alpha_pll_enable()
360 ret = regmap_read(pll->clkr.regmap, PLL_MODE(pll), &val); in clk_alpha_pll_disable()
371 regmap_update_bits(pll->clkr.regmap, PLL_MODE(pll), mask, 0); in clk_alpha_pll_disable()
378 regmap_update_bits(pll->clkr.regmap, PLL_MODE(pll), mask, 0); in clk_alpha_pll_disable()
436 regmap_read(pll->clkr.regmap, PLL_L_VAL(pll), &l); in clk_alpha_pll_recalc_rate()
438 regmap_read(pll->clkr.regmap, PLL_USER_CTL(pll), &ctl); in clk_alpha_pll_recalc_rate()
440 regmap_read(pll->clkr.regmap, PLL_ALPHA_VAL(pll), &low); in clk_alpha_pll_recalc_rate()
442 regmap_read(pll->clkr.regmap, PLL_ALPHA_VAL_U(pll), in clk_alpha_pll_recalc_rate()
462 regmap_read(pll->clkr.regmap, PLL_MODE(pll), &mode); in __clk_alpha_pll_update_latch()
465 regmap_update_bits(pll->clkr.regmap, PLL_MODE(pll), PLL_UPDATE, in __clk_alpha_pll_update_latch()
483 regmap_update_bits(pll->clkr.regmap, PLL_MODE(pll), PLL_UPDATE, 0); in __clk_alpha_pll_update_latch()
503 if (!is_enabled(&pll->clkr.hw) || in clk_alpha_pll_update_latch()
526 regmap_write(pll->clkr.regmap, PLL_L_VAL(pll), l); in __clk_alpha_pll_set_rate()
532 regmap_write(pll->clkr.regmap, PLL_ALPHA_VAL_U(pll), a >> 32); in __clk_alpha_pll_set_rate()
534 regmap_write(pll->clkr.regmap, PLL_ALPHA_VAL(pll), a); in __clk_alpha_pll_set_rate()
537 regmap_update_bits(pll->clkr.regmap, PLL_USER_CTL(pll), in __clk_alpha_pll_set_rate()
542 regmap_update_bits(pll->clkr.regmap, PLL_USER_CTL(pll), in __clk_alpha_pll_set_rate()
634 regmap_read(pll->clkr.regmap, PLL_L_VAL(pll), &l); in alpha_pll_huayra_recalc_rate()
635 regmap_read(pll->clkr.regmap, PLL_USER_CTL(pll), &ctl); in alpha_pll_huayra_recalc_rate()
638 regmap_read(pll->clkr.regmap, PLL_ALPHA_VAL(pll), &alpha); in alpha_pll_huayra_recalc_rate()
689 regmap_read(pll->clkr.regmap, PLL_USER_CTL(pll), &ctl); in alpha_pll_huayra_set_rate()
692 regmap_read(pll->clkr.regmap, PLL_ALPHA_VAL(pll), &cur_alpha); in alpha_pll_huayra_set_rate()
705 regmap_write(pll->clkr.regmap, PLL_L_VAL(pll), l); in alpha_pll_huayra_set_rate()
711 regmap_write(pll->clkr.regmap, PLL_L_VAL(pll), l); in alpha_pll_huayra_set_rate()
712 regmap_write(pll->clkr.regmap, PLL_ALPHA_VAL(pll), a); in alpha_pll_huayra_set_rate()
715 regmap_update_bits(pll->clkr.regmap, PLL_USER_CTL(pll), in alpha_pll_huayra_set_rate()
718 regmap_update_bits(pll->clkr.regmap, PLL_USER_CTL(pll), in alpha_pll_huayra_set_rate()
768 regmap_read(pll->clkr.regmap, PLL_USER_CTL(pll), &ctl); in clk_alpha_pll_postdiv_recalc_rate()
815 regmap_read(pll->clkr.regmap, PLL_USER_CTL(pll), &ctl); in clk_alpha_pll_postdiv_round_ro_rate()
836 return regmap_update_bits(pll->clkr.regmap, PLL_USER_CTL(pll), in clk_alpha_pll_postdiv_set_rate()
887 struct regmap *regmap = pll->clkr.regmap; in alpha_pll_fabia_enable()
944 struct regmap *regmap = pll->clkr.regmap; in alpha_pll_fabia_disable()
976 regmap_read(pll->clkr.regmap, PLL_L_VAL(pll), &l); in alpha_pll_fabia_recalc_rate()
977 regmap_read(pll->clkr.regmap, PLL_FRAC(pll), &frac); in alpha_pll_fabia_recalc_rate()
991 ret = regmap_read(pll->clkr.regmap, PLL_MODE(pll), &val); in alpha_pll_fabia_set_rate()
1006 regmap_write(pll->clkr.regmap, PLL_L_VAL(pll), l); in alpha_pll_fabia_set_rate()
1007 regmap_write(pll->clkr.regmap, PLL_FRAC(pll), a); in alpha_pll_fabia_set_rate()
1043 ret = regmap_read(pll->clkr.regmap, PLL_USER_CTL(pll), &val); in clk_alpha_pll_postdiv_fabia_recalc_rate()
1084 ret = regmap_read(pll->clkr.regmap, PLL_MODE(pll), &val); in clk_alpha_pll_postdiv_fabia_set_rate()
1104 return regmap_update_bits(pll->clkr.regmap, PLL_USER_CTL(pll), in clk_alpha_pll_postdiv_fabia_set_rate()