Lines Matching refs:clkr

39 	ret = regmap_read(pll->clkr.regmap, pll->mode_reg, &val);  in clk_pll_enable()
48 ret = regmap_update_bits(pll->clkr.regmap, pll->mode_reg, PLL_BYPASSNL, in clk_pll_enable()
60 ret = regmap_update_bits(pll->clkr.regmap, pll->mode_reg, PLL_RESET_N, in clk_pll_enable()
69 return regmap_update_bits(pll->clkr.regmap, pll->mode_reg, PLL_OUTCTRL, in clk_pll_enable()
79 regmap_read(pll->clkr.regmap, pll->mode_reg, &val); in clk_pll_disable()
84 regmap_update_bits(pll->clkr.regmap, pll->mode_reg, mask, 0); in clk_pll_disable()
95 regmap_read(pll->clkr.regmap, pll->l_reg, &l); in clk_pll_recalc_rate()
96 regmap_read(pll->clkr.regmap, pll->m_reg, &m); in clk_pll_recalc_rate()
97 regmap_read(pll->clkr.regmap, pll->n_reg, &n); in clk_pll_recalc_rate()
111 regmap_read(pll->clkr.regmap, pll->config_reg, &config); in clk_pll_recalc_rate()
161 regmap_read(pll->clkr.regmap, pll->mode_reg, &mode); in clk_pll_set_rate()
167 regmap_update_bits(pll->clkr.regmap, pll->l_reg, 0x3ff, f->l); in clk_pll_set_rate()
168 regmap_update_bits(pll->clkr.regmap, pll->m_reg, 0x7ffff, f->m); in clk_pll_set_rate()
169 regmap_update_bits(pll->clkr.regmap, pll->n_reg, 0x7ffff, f->n); in clk_pll_set_rate()
170 regmap_write(pll->clkr.regmap, pll->config_reg, f->ibits); in clk_pll_set_rate()
192 const char *name = clk_hw_get_name(&pll->clkr.hw); in wait_for_pll()
196 ret = regmap_read(pll->clkr.regmap, pll->status_reg, &val); in wait_for_pll()
277 ret = regmap_read(pll->clkr.regmap, pll->mode_reg, &mode); in clk_pll_sr2_enable()
282 ret = regmap_update_bits(pll->clkr.regmap, pll->mode_reg, PLL_BYPASSNL, in clk_pll_sr2_enable()
294 ret = regmap_update_bits(pll->clkr.regmap, pll->mode_reg, PLL_RESET_N, in clk_pll_sr2_enable()
304 return regmap_update_bits(pll->clkr.regmap, pll->mode_reg, PLL_OUTCTRL, in clk_pll_sr2_enable()
321 regmap_read(pll->clkr.regmap, pll->mode_reg, &mode); in clk_pll_sr2_set_rate()
327 regmap_update_bits(pll->clkr.regmap, pll->l_reg, 0x3ff, f->l); in clk_pll_sr2_set_rate()
328 regmap_update_bits(pll->clkr.regmap, pll->m_reg, 0x7ffff, f->m); in clk_pll_sr2_set_rate()
329 regmap_update_bits(pll->clkr.regmap, pll->n_reg, 0x7ffff, f->n); in clk_pll_sr2_set_rate()