Lines Matching refs:cpuclk
75 struct rockchip_cpuclk *cpuclk, unsigned long rate) in rockchip_get_cpuclk_settings() argument
78 cpuclk->rate_table; in rockchip_get_cpuclk_settings()
81 for (i = 0; i < cpuclk->rate_count; i++) { in rockchip_get_cpuclk_settings()
92 struct rockchip_cpuclk *cpuclk = to_rockchip_cpuclk_hw(hw); in rockchip_cpuclk_recalc_rate() local
93 const struct rockchip_cpuclk_reg_data *reg_data = cpuclk->reg_data; in rockchip_cpuclk_recalc_rate()
94 u32 clksel0 = readl_relaxed(cpuclk->reg_base + reg_data->core_reg); in rockchip_cpuclk_recalc_rate()
105 static void rockchip_cpuclk_set_dividers(struct rockchip_cpuclk *cpuclk, in rockchip_cpuclk_set_dividers() argument
119 writel(clksel->val, cpuclk->reg_base + clksel->reg); in rockchip_cpuclk_set_dividers()
123 static int rockchip_cpuclk_pre_rate_change(struct rockchip_cpuclk *cpuclk, in rockchip_cpuclk_pre_rate_change() argument
126 const struct rockchip_cpuclk_reg_data *reg_data = cpuclk->reg_data; in rockchip_cpuclk_pre_rate_change()
132 rate = rockchip_get_cpuclk_settings(cpuclk, ndata->new_rate); in rockchip_cpuclk_pre_rate_change()
139 alt_prate = clk_get_rate(cpuclk->alt_parent); in rockchip_cpuclk_pre_rate_change()
141 spin_lock_irqsave(cpuclk->lock, flags); in rockchip_cpuclk_pre_rate_change()
173 cpuclk->reg_base + reg_data->core_reg); in rockchip_cpuclk_pre_rate_change()
179 cpuclk->reg_base + reg_data->core_reg); in rockchip_cpuclk_pre_rate_change()
182 spin_unlock_irqrestore(cpuclk->lock, flags); in rockchip_cpuclk_pre_rate_change()
186 static int rockchip_cpuclk_post_rate_change(struct rockchip_cpuclk *cpuclk, in rockchip_cpuclk_post_rate_change() argument
189 const struct rockchip_cpuclk_reg_data *reg_data = cpuclk->reg_data; in rockchip_cpuclk_post_rate_change()
193 rate = rockchip_get_cpuclk_settings(cpuclk, ndata->new_rate); in rockchip_cpuclk_post_rate_change()
200 spin_lock_irqsave(cpuclk->lock, flags); in rockchip_cpuclk_post_rate_change()
203 rockchip_cpuclk_set_dividers(cpuclk, rate); in rockchip_cpuclk_post_rate_change()
217 cpuclk->reg_base + reg_data->core_reg); in rockchip_cpuclk_post_rate_change()
220 rockchip_cpuclk_set_dividers(cpuclk, rate); in rockchip_cpuclk_post_rate_change()
222 spin_unlock_irqrestore(cpuclk->lock, flags); in rockchip_cpuclk_post_rate_change()
236 struct rockchip_cpuclk *cpuclk = to_rockchip_cpuclk_nb(nb); in rockchip_cpuclk_notifier_cb() local
242 ret = rockchip_cpuclk_pre_rate_change(cpuclk, ndata); in rockchip_cpuclk_notifier_cb()
244 ret = rockchip_cpuclk_post_rate_change(cpuclk, ndata); in rockchip_cpuclk_notifier_cb()
255 struct rockchip_cpuclk *cpuclk; in rockchip_clk_register_cpuclk() local
265 cpuclk = kzalloc(sizeof(*cpuclk), GFP_KERNEL); in rockchip_clk_register_cpuclk()
266 if (!cpuclk) in rockchip_clk_register_cpuclk()
282 cpuclk->reg_base = reg_base; in rockchip_clk_register_cpuclk()
283 cpuclk->lock = lock; in rockchip_clk_register_cpuclk()
284 cpuclk->reg_data = reg_data; in rockchip_clk_register_cpuclk()
285 cpuclk->clk_nb.notifier_call = rockchip_cpuclk_notifier_cb; in rockchip_clk_register_cpuclk()
286 cpuclk->hw.init = &init; in rockchip_clk_register_cpuclk()
288 cpuclk->alt_parent = __clk_lookup(parent_names[reg_data->mux_core_alt]); in rockchip_clk_register_cpuclk()
289 if (!cpuclk->alt_parent) { in rockchip_clk_register_cpuclk()
296 ret = clk_prepare_enable(cpuclk->alt_parent); in rockchip_clk_register_cpuclk()
312 ret = clk_notifier_register(clk, &cpuclk->clk_nb); in rockchip_clk_register_cpuclk()
320 cpuclk->rate_count = nrates; in rockchip_clk_register_cpuclk()
321 cpuclk->rate_table = kmemdup(rates, in rockchip_clk_register_cpuclk()
324 if (!cpuclk->rate_table) { in rockchip_clk_register_cpuclk()
330 cclk = clk_register(NULL, &cpuclk->hw); in rockchip_clk_register_cpuclk()
340 kfree(cpuclk->rate_table); in rockchip_clk_register_cpuclk()
342 clk_notifier_unregister(clk, &cpuclk->clk_nb); in rockchip_clk_register_cpuclk()
344 clk_disable_unprepare(cpuclk->alt_parent); in rockchip_clk_register_cpuclk()
346 kfree(cpuclk); in rockchip_clk_register_cpuclk()