Lines Matching refs:GFLAGS
153 #define GFLAGS (CLK_GATE_HIWORD_MASK | CLK_GATE_SET_TO_DISABLE) macro
181 RK2928_CLKGATE_CON(0), 6, GFLAGS),
190 RK2928_CLKGATE_CON(0), 2, GFLAGS),
192 RK2928_CLKGATE_CON(0), 8, GFLAGS),
199 RK2928_CLKGATE_CON(0), 7, GFLAGS),
202 RK2928_CLKGATE_CON(0), 7, GFLAGS),
204 GATE(0, "dpll_cpu", "dpll", 0, RK2928_CLKGATE_CON(10), 8, GFLAGS),
205 GATE(0, "gpll_cpu", "gpll", 0, RK2928_CLKGATE_CON(0), 1, GFLAGS),
209 RK2928_CLKGATE_CON(0), 3, GFLAGS),
212 RK2928_CLKGATE_CON(0), 5, GFLAGS),
215 RK2928_CLKGATE_CON(0), 4, GFLAGS),
219 RK2928_CLKGATE_CON(2), 0, GFLAGS),
222 RK2928_CLKGATE_CON(2), 1, GFLAGS),
226 RK2928_CLKGATE_CON(2), 3, GFLAGS),
230 RK2928_CLKGATE_CON(2), 2, GFLAGS),
234 RK2928_CLKGATE_CON(1), 0, GFLAGS),
237 RK2928_CLKGATE_CON(1), 1, GFLAGS),
240 RK2928_CLKGATE_CON(2), 4, GFLAGS),
243 RK2928_CLKGATE_CON(2), 5, GFLAGS),
249 RK2928_CLKGATE_CON(1), 8, GFLAGS),
252 RK2928_CLKGATE_CON(1), 10, GFLAGS),
255 RK2928_CLKGATE_CON(1), 12, GFLAGS),
258 RK2928_CLKGATE_CON(1), 9, GFLAGS,
262 RK2928_CLKGATE_CON(1), 11, GFLAGS,
266 RK2928_CLKGATE_CON(1), 13, GFLAGS,
271 RK2928_CLKGATE_CON(3), 11, GFLAGS),
273 RK2928_CLKGATE_CON(3), 12, GFLAGS),
277 RK2928_CLKGATE_CON(10), 6, GFLAGS),
281 RK2928_CLKGATE_CON(1), 4, GFLAGS),
284 RK2928_CLKGATE_CON(0), 11, GFLAGS),
287 RK2928_CLKGATE_CON(3), 2, GFLAGS),
291 RK2928_CLKGATE_CON(2), 11, GFLAGS),
297 RK2928_CLKGATE_CON(2), 13, GFLAGS),
303 RK2928_CLKGATE_CON(2), 14, GFLAGS),
316 RK2928_CLKGATE_CON(0), 9, GFLAGS),
319 RK2928_CLKGATE_CON(0), 10, GFLAGS,
323 RK2928_CLKGATE_CON(0), 13, GFLAGS),
325 RK2928_CLKGATE_CON(0), 14, GFLAGS),
329 RK2928_CLKGATE_CON(2), 10, GFLAGS),
332 RK2928_CLKGATE_CON(2), 12, GFLAGS,
336 RK2928_CLKGATE_CON(1), 5, GFLAGS),
340 RK2928_CLKGATE_CON(3), 13, GFLAGS),
344 RK2928_CLKGATE_CON(2), 9, GFLAGS),
348 RK2928_CLKGATE_CON(10), 4, GFLAGS),
352 RK2928_CLKGATE_CON(10), 5, GFLAGS),
361 RK2928_CLKGATE_CON(2), 6, GFLAGS),
372 GATE(0, "sclk_intmem", "aclk_cpu", CLK_IGNORE_UNUSED, RK2928_CLKGATE_CON(4), 12, GFLAGS),
373 GATE(0, "aclk_strc_sys", "aclk_cpu", CLK_IGNORE_UNUSED, RK2928_CLKGATE_CON(4), 10, GFLAGS),
376 GATE(HCLK_ROM, "hclk_rom", "hclk_cpu", CLK_IGNORE_UNUSED, RK2928_CLKGATE_CON(5), 6, GFLAGS),
379 GATE(PCLK_GRF, "pclk_grf", "pclk_cpu", CLK_IGNORE_UNUSED, RK2928_CLKGATE_CON(5), 4, GFLAGS),
380 GATE(PCLK_DDRUPCTL, "pclk_ddrupctl", "pclk_cpu", 0, RK2928_CLKGATE_CON(5), 7, GFLAGS),
381 GATE(PCLK_ACODEC, "pclk_acodec", "pclk_cpu", 0, RK2928_CLKGATE_CON(5), 14, GFLAGS),
382 GATE(PCLK_HDMI, "pclk_hdmi", "pclk_cpu", 0, RK2928_CLKGATE_CON(3), 8, GFLAGS),
385 GATE(ACLK_VIO, "aclk_vio", "aclk_disp1_pre", CLK_IGNORE_UNUSED, RK2928_CLKGATE_CON(6), 13, GFLAGS),
386 GATE(ACLK_LCDC, "aclk_lcdc", "aclk_disp1_pre", 0, RK2928_CLKGATE_CON(9), 6, GFLAGS),
388 …LK_VIO_BUS, "hclk_vio_bus", "hclk_disp_pre", CLK_IGNORE_UNUSED, RK2928_CLKGATE_CON(6), 12, GFLAGS),
389 GATE(HCLK_LCDC, "hclk_lcdc", "hclk_disp_pre", 0, RK2928_CLKGATE_CON(9), 5, GFLAGS),
393 GATE(SCLK_PVTM_CORE, "sclk_pvtm_core", "xin24m", 0, RK2928_CLKGATE_CON(10), 0, GFLAGS),
394 GATE(SCLK_PVTM_GPU, "sclk_pvtm_gpu", "xin24m", 0, RK2928_CLKGATE_CON(10), 1, GFLAGS),
397 GATE(0, "aclk_peri_axi_matrix", "aclk_peri", CLK_IGNORE_UNUSED, RK2928_CLKGATE_CON(4), 3, GFLAGS),
398 GATE(0, "aclk_cpu_peri", "aclk_peri", CLK_IGNORE_UNUSED, RK2928_CLKGATE_CON(4), 2, GFLAGS),
399 GATE(ACLK_DMAC2, "aclk_dmac2", "aclk_peri", 0, RK2928_CLKGATE_CON(5), 1, GFLAGS),
400 GATE(0, "aclk_peri_niu", "aclk_peri", CLK_IGNORE_UNUSED, RK2928_CLKGATE_CON(9), 15, GFLAGS),
403 GATE(0, "hclk_peri_matrix", "hclk_peri", CLK_IGNORE_UNUSED, RK2928_CLKGATE_CON(4), 0, GFLAGS),
404 GATE(0, "hclk_usb_peri", "hclk_peri", CLK_IGNORE_UNUSED, RK2928_CLKGATE_CON(9), 13, GFLAGS),
405 GATE(0, "hclk_peri_arbi", "hclk_peri", CLK_IGNORE_UNUSED, RK2928_CLKGATE_CON(9), 14, GFLAGS),
406 GATE(HCLK_NANDC, "hclk_nandc", "hclk_peri", 0, RK2928_CLKGATE_CON(5), 9, GFLAGS),
407 GATE(HCLK_SDMMC, "hclk_sdmmc", "hclk_peri", 0, RK2928_CLKGATE_CON(5), 10, GFLAGS),
408 GATE(HCLK_SDIO, "hclk_sdio", "hclk_peri", 0, RK2928_CLKGATE_CON(5), 11, GFLAGS),
409 GATE(HCLK_EMMC, "hclk_emmc", "hclk_peri", 0, RK2928_CLKGATE_CON(7), 0, GFLAGS),
410 GATE(HCLK_OTG0, "hclk_otg0", "hclk_peri", CLK_IGNORE_UNUSED, RK2928_CLKGATE_CON(5), 13, GFLAGS),
411 GATE(HCLK_OTG1, "hclk_otg1", "hclk_peri", CLK_IGNORE_UNUSED, RK2928_CLKGATE_CON(7), 3, GFLAGS),
412 GATE(HCLK_I2S, "hclk_i2s", "hclk_peri", 0, RK2928_CLKGATE_CON(7), 2, GFLAGS),
413 GATE(0, "hclk_sfc", "hclk_peri", CLK_IGNORE_UNUSED, RK2928_CLKGATE_CON(3), 14, GFLAGS),
414 GATE(HCLK_MAC, "hclk_mac", "hclk_peri", 0, RK2928_CLKGATE_CON(3), 5, GFLAGS),
417 GATE(0, "pclk_peri_matrix", "pclk_peri", CLK_IGNORE_UNUSED, RK2928_CLKGATE_CON(4), 1, GFLAGS),
418 GATE(0, "pclk_efuse", "pclk_peri", CLK_IGNORE_UNUSED, RK2928_CLKGATE_CON(5), 2, GFLAGS),
419 GATE(PCLK_TIMER, "pclk_timer", "pclk_peri", 0, RK2928_CLKGATE_CON(7), 7, GFLAGS),
420 GATE(PCLK_PWM, "pclk_pwm", "pclk_peri", 0, RK2928_CLKGATE_CON(7), 10, GFLAGS),
421 GATE(PCLK_SPI, "pclk_spi", "pclk_peri", 0, RK2928_CLKGATE_CON(7), 12, GFLAGS),
422 GATE(PCLK_WDT, "pclk_wdt", "pclk_peri", 0, RK2928_CLKGATE_CON(7), 15, GFLAGS),
423 GATE(PCLK_UART0, "pclk_uart0", "pclk_peri", 0, RK2928_CLKGATE_CON(8), 0, GFLAGS),
424 GATE(PCLK_UART1, "pclk_uart1", "pclk_peri", 0, RK2928_CLKGATE_CON(8), 1, GFLAGS),
425 GATE(PCLK_UART2, "pclk_uart2", "pclk_peri", 0, RK2928_CLKGATE_CON(8), 2, GFLAGS),
426 GATE(PCLK_I2C0, "pclk_i2c0", "pclk_peri", 0, RK2928_CLKGATE_CON(8), 4, GFLAGS),
427 GATE(PCLK_I2C1, "pclk_i2c1", "pclk_peri", 0, RK2928_CLKGATE_CON(8), 5, GFLAGS),
428 GATE(PCLK_I2C2, "pclk_i2c2", "pclk_peri", 0, RK2928_CLKGATE_CON(8), 6, GFLAGS),
429 GATE(PCLK_GPIO0, "pclk_gpio0", "pclk_peri", 0, RK2928_CLKGATE_CON(8), 9, GFLAGS),
430 GATE(PCLK_GPIO1, "pclk_gpio1", "pclk_peri", 0, RK2928_CLKGATE_CON(8), 10, GFLAGS),
431 GATE(PCLK_GPIO2, "pclk_gpio2", "pclk_peri", 0, RK2928_CLKGATE_CON(8), 11, GFLAGS),