clk/rockchip/clk-rk3228.c

138 PNAME(mux_pll_p)		= { "clk_24m", "xin24m" };
140 PNAME(mux_ddrphy_p)		= { "dpll_ddr", "gpll_ddr", "apll_ddr" };
141 PNAME(mux_armclk_p)		= { "apll_core", "gpll_core", "dpll_core" };
142 PNAME(mux_usb480m_phy_p)	= { "usb480m_phy0", "usb480m_phy1" };
143 PNAME(mux_usb480m_p)		= { "usb480m_phy", "xin24m" };
144 PNAME(mux_hdmiphy_p)		= { "hdmiphy_phy", "xin24m" };
145 PNAME(mux_aclk_cpu_src_p)	= { "cpll_aclk_cpu", "gpll_aclk_cpu", "hdmiphy_aclk_cpu" };
147 PNAME(mux_pll_src_4plls_p)	= { "cpll", "gpll", "hdmiphy", "usb480m" };
148 PNAME(mux_pll_src_3plls_p)	= { "cpll", "gpll", "hdmiphy" };
149 PNAME(mux_pll_src_2plls_p)	= { "cpll", "gpll" };
150 PNAME(mux_sclk_hdmi_cec_p)	= { "cpll", "gpll", "xin24m" };
151 PNAME(mux_aclk_peri_src_p)	= { "cpll_peri", "gpll_peri", "hdmiphy_peri" };
152 PNAME(mux_mmc_src_p)		= { "cpll", "gpll", "xin24m", "usb480m" };
153 PNAME(mux_pll_src_cpll_gpll_usb480m_p)	= { "cpll", "gpll", "usb480m" };
155 PNAME(mux_sclk_rga_p)		= { "gpll", "cpll", "sclk_rga_src" };
157 PNAME(mux_sclk_vop_src_p)	= { "gpll_vop", "cpll_vop" };
158 PNAME(mux_dclk_vop_p)		= { "hdmiphy", "sclk_vop_pre" };
160 PNAME(mux_i2s0_p)		= { "i2s0_src", "i2s0_frac", "ext_i2s", "xin12m" };
161 PNAME(mux_i2s1_pre_p)		= { "i2s1_src", "i2s1_frac", "ext_i2s", "xin12m" };
162 PNAME(mux_i2s_out_p)		= { "i2s1_pre", "xin12m" };
163 PNAME(mux_i2s2_p)		= { "i2s2_src", "i2s2_frac", "xin12m" };
164 PNAME(mux_sclk_spdif_p)		= { "sclk_spdif_src", "spdif_frac", "xin12m" };
166 PNAME(mux_uart0_p)		= { "uart0_src", "uart0_frac", "xin24m" };
167 PNAME(mux_uart1_p)		= { "uart1_src", "uart1_frac", "xin24m" };
168 PNAME(mux_uart2_p)		= { "uart2_src", "uart2_frac", "xin24m" };
170 PNAME(mux_sclk_mac_extclk_p)	= { "ext_gmac", "phy_50m_out" };
171 PNAME(mux_sclk_gmac_pre_p)	= { "sclk_gmac_src", "sclk_mac_extclk" };
172 PNAME(mux_sclk_macphy_p)	= { "sclk_gmac_src", "ext_gmac" };