Lines Matching refs:RK3288_CLKSEL_CON
120 .reg = RK3288_CLKSEL_CON(0), \
128 .reg = RK3288_CLKSEL_CON(37), \
165 .core_reg = RK3288_CLKSEL_CON(0),
234 RK3288_CLKSEL_CON(4), 8, 2, MFLAGS);
238 RK3288_CLKSEL_CON(5), 8, 2, MFLAGS);
242 RK3288_CLKSEL_CON(40), 8, 2, MFLAGS);
246 RK3288_CLKSEL_CON(13), 8, 2, MFLAGS);
250 RK3288_CLKSEL_CON(14), 8, 2, MFLAGS);
254 RK3288_CLKSEL_CON(15), 8, 2, MFLAGS);
258 RK3288_CLKSEL_CON(16), 8, 2, MFLAGS);
262 RK3288_CLKSEL_CON(3), 8, 2, MFLAGS);
275 RK3288_CLKSEL_CON(36), 0, 3, DFLAGS | CLK_DIVIDER_READ_ONLY,
278 RK3288_CLKSEL_CON(36), 4, 3, DFLAGS | CLK_DIVIDER_READ_ONLY,
281 RK3288_CLKSEL_CON(36), 8, 3, DFLAGS | CLK_DIVIDER_READ_ONLY,
284 RK3288_CLKSEL_CON(36), 12, 3, DFLAGS | CLK_DIVIDER_READ_ONLY,
287 RK3288_CLKSEL_CON(37), 0, 3, DFLAGS | CLK_DIVIDER_READ_ONLY,
290 RK3288_CLKSEL_CON(0), 0, 4, DFLAGS | CLK_DIVIDER_READ_ONLY,
293 RK3288_CLKSEL_CON(0), 4, 4, DFLAGS | CLK_DIVIDER_READ_ONLY,
296 RK3288_CLKSEL_CON(37), 4, 5, DFLAGS | CLK_DIVIDER_READ_ONLY,
299 RK3288_CLKSEL_CON(37), 9, 5, DFLAGS | CLK_DIVIDER_READ_ONLY,
313 RK3288_CLKSEL_CON(26), 2, 1, MFLAGS, 0, 2,
321 RK3288_CLKSEL_CON(1), 15, 1, MFLAGS, 3, 5, DFLAGS),
323 RK3288_CLKSEL_CON(1), 0, 3, DFLAGS),
327 RK3288_CLKSEL_CON(1), 12, 3, DFLAGS,
330 RK3288_CLKSEL_CON(1), 8, 2, DFLAGS, div_hclk_cpu_t,
335 RK3288_CLKSEL_CON(26), 6, 2, DFLAGS,
343 RK3288_CLKSEL_CON(4), 15, 1, MFLAGS, 0, 7, DFLAGS,
346 RK3288_CLKSEL_CON(8), 0,
350 RK3288_CLKSEL_CON(4), 12, 1, MFLAGS,
356 RK3288_CLKSEL_CON(5), 15, 1, MFLAGS),
358 RK3288_CLKSEL_CON(5), 0, 7, DFLAGS,
361 RK3288_CLKSEL_CON(9), 0,
367 RK3288_CLKSEL_CON(40), 0, 7, DFLAGS,
370 RK3288_CLKSEL_CON(41), 0,
397 RK3288_CLKSEL_CON(32), 6, 2, MFLAGS, 0, 5, DFLAGS,
400 RK3288_CLKSEL_CON(32), 14, 2, MFLAGS, 8, 5, DFLAGS,
414 RK3288_CLKSEL_CON(31), 6, 2, MFLAGS, 0, 5, DFLAGS,
417 RK3288_CLKSEL_CON(28), 8, 5, DFLAGS),
419 RK3288_CLKSEL_CON(31), 14, 2, MFLAGS, 8, 5, DFLAGS,
423 RK3288_CLKSEL_CON(30), 6, 2, MFLAGS, 0, 5, DFLAGS,
426 RK3288_CLKSEL_CON(30), 14, 2, MFLAGS, 8, 5, DFLAGS,
430 RK3288_CLKSEL_CON(27), 0, 2, MFLAGS, 8, 8, DFLAGS,
433 RK3288_CLKSEL_CON(29), 6, 2, MFLAGS, 8, 8, DFLAGS,
437 RK3288_CLKSEL_CON(28), 15, 1, MFLAGS,
440 RK3288_CLKSEL_CON(28), 6, 2, MFLAGS, 0, 6, DFLAGS,
444 RK3288_CLKSEL_CON(6), 6, 2, MFLAGS, 0, 6, DFLAGS,
447 RK3288_CLKSEL_CON(6), 14, 2, MFLAGS, 8, 6, DFLAGS,
456 RK3288_CLKSEL_CON(39), 14, 2, MFLAGS, 8, 5, DFLAGS,
459 RK3288_CLKSEL_CON(40), 12, 2, DFLAGS),
462 RK3288_CLKSEL_CON(42), 6, 2, MFLAGS, 0, 5, DFLAGS,
465 RK3288_CLKSEL_CON(42), 14, 2, MFLAGS, 8, 5, DFLAGS,
469 RK3288_CLKSEL_CON(26), 8, 1, MFLAGS,
472 RK3288_CLKSEL_CON(26), 15, 1, MFLAGS, 9, 5, DFLAGS),
475 RK3288_CLKSEL_CON(33), 8, 5, DFLAGS),
477 RK3288_CLKSEL_CON(33), 0, 5, DFLAGS,
481 RK3288_CLKSEL_CON(34), 6, 2, MFLAGS, 0, 5, DFLAGS,
485 RK3288_CLKSEL_CON(10), 15, 1, MFLAGS, 0, 5, DFLAGS,
488 RK3288_CLKSEL_CON(10), 12, 2, DFLAGS | CLK_DIVIDER_POWER_OF_TWO,
491 RK3288_CLKSEL_CON(10), 8, 2, DFLAGS | CLK_DIVIDER_POWER_OF_TWO,
501 RK3288_CLKSEL_CON(25), 7, 1, MFLAGS, 0, 7, DFLAGS,
504 RK3288_CLKSEL_CON(25), 15, 1, MFLAGS, 8, 7, DFLAGS,
507 RK3288_CLKSEL_CON(39), 7, 1, MFLAGS, 0, 7, DFLAGS,
511 RK3288_CLKSEL_CON(11), 6, 2, MFLAGS, 0, 6, DFLAGS,
514 RK3288_CLKSEL_CON(12), 6, 2, MFLAGS, 0, 6, DFLAGS,
517 RK3288_CLKSEL_CON(34), 14, 2, MFLAGS, 8, 6, DFLAGS,
520 RK3288_CLKSEL_CON(12), 14, 2, MFLAGS, 8, 6, DFLAGS,
536 RK3288_CLKSEL_CON(35), 14, 2, MFLAGS, 8, 5, DFLAGS,
539 RK3288_CLKSEL_CON(35), 6, 2, MFLAGS, 0, 5, DFLAGS,
552 RK3288_CLKSEL_CON(2), 0, 6, DFLAGS,
556 RK3288_CLKSEL_CON(24), 8, 8, DFLAGS,
563 RK3288_CLKSEL_CON(38), 7, 1, MFLAGS, 0, 5, DFLAGS,
566 RK3288_CLKSEL_CON(38), 15, 1, MFLAGS, 8, 5, DFLAGS,
570 RK3288_CLKSEL_CON(13), 13, 2, MFLAGS, 0, 7, DFLAGS,
573 RK3288_CLKSEL_CON(17), 0,
577 RK3288_CLKSEL_CON(13), 15, 1, MFLAGS),
579 RK3288_CLKSEL_CON(14), 0, 7, DFLAGS,
582 RK3288_CLKSEL_CON(18), 0,
586 RK3288_CLKSEL_CON(15), 0, 7, DFLAGS,
589 RK3288_CLKSEL_CON(19), 0,
593 RK3288_CLKSEL_CON(16), 0, 7, DFLAGS,
596 RK3288_CLKSEL_CON(20), 0,
600 RK3288_CLKSEL_CON(3), 0, 7, DFLAGS,
603 RK3288_CLKSEL_CON(7), 0,
608 RK3288_CLKSEL_CON(21), 0, 2, MFLAGS, 8, 5, DFLAGS,
611 RK3288_CLKSEL_CON(21), 4, 1, MFLAGS),
622 RK3288_CLKSEL_CON(22), 0, 1, MFLAGS, 8, 8, DFLAGS,
625 RK3288_CLKSEL_CON(22), 4, 1, MFLAGS),
627 RK3288_CLKSEL_CON(22), 7, IFLAGS),
633 RK3288_CLKSEL_CON(13), 11, 2, MFLAGS,
636 RK3288_CLKSEL_CON(29), 0, 2, MFLAGS,
641 RK3288_CLKSEL_CON(11), 8, 6, DFLAGS),
643 RK3288_CLKSEL_CON(22), 4, 1, MFLAGS),
802 INVERTER(0, "pclk_vip", "pclk_vip_in", RK3288_CLKSEL_CON(29), 4, IFLAGS),
804 INVERTER(0, "pclk_isp", "pclk_isp_in", RK3288_CLKSEL_CON(29), 3, IFLAGS),
833 RK3288_CLKSEL_CON(0),
834 RK3288_CLKSEL_CON(1),
835 RK3288_CLKSEL_CON(10),
836 RK3288_CLKSEL_CON(33),
837 RK3288_CLKSEL_CON(37),