clk/rockchip/clk-rv1108.c

126 PNAME(mux_pll_p)		= { "xin24m", "xin24m"};
127 PNAME(mux_ddrphy_p)		= { "dpll_ddr", "gpll_ddr", "apll_ddr" };
128 PNAME(mux_armclk_p)		= { "apll_core", "gpll_core", "dpll_core" };
129 PNAME(mux_usb480m_pre_p)	= { "usbphy", "xin24m" };
130 PNAME(mux_hdmiphy_phy_p)	= { "hdmiphy", "xin24m" };
131 PNAME(mux_dclk_hdmiphy_pre_p)	= { "dclk_hdmiphy_src_gpll", "dclk_hdmiphy_src_dpll" };
132 PNAME(mux_pll_src_4plls_p)	= { "dpll", "gpll", "hdmiphy", "usb480m" };
133 PNAME(mux_pll_src_3plls_p)	= { "apll", "gpll", "dpll" };
134 PNAME(mux_pll_src_2plls_p)	= { "dpll", "gpll" };
135 PNAME(mux_pll_src_apll_gpll_p)	= { "apll", "gpll" };
136 PNAME(mux_aclk_peri_src_p)	= { "aclk_peri_src_gpll", "aclk_peri_src_dpll" };
137 PNAME(mux_aclk_bus_src_p)	= { "aclk_bus_src_gpll", "aclk_bus_src_apll", "aclk_bus_src_dpll" };
138 PNAME(mux_mmc_src_p)		= { "dpll", "gpll", "xin24m", "usb480m" };
139 PNAME(mux_pll_src_dpll_gpll_usb480m_p)	= { "dpll", "gpll", "usb480m" };
140 PNAME(mux_uart0_p)		= { "uart0_src", "uart0_frac", "xin24m" };
141 PNAME(mux_uart1_p)		= { "uart1_src", "uart1_frac", "xin24m" };
142 PNAME(mux_uart2_p)		= { "uart2_src", "uart2_frac", "xin24m" };
143 PNAME(mux_sclk_mac_p)		= { "sclk_mac_pre", "ext_gmac" };
144 PNAME(mux_i2s0_pre_p)		= { "i2s0_src", "i2s0_frac", "ext_i2s", "xin12m" };
145 PNAME(mux_i2s_out_p)		= { "i2s0_pre", "xin12m" };
146 PNAME(mux_i2s1_p)		= { "i2s1_src", "i2s1_frac", "dummy", "xin12m" };
147 PNAME(mux_i2s2_p)		= { "i2s2_src", "i2s2_frac", "dummy", "xin12m" };
148 PNAME(mux_wifi_src_p)		= { "gpll", "xin24m" };
149 PNAME(mux_cifout_src_p)	= { "hdmiphy", "gpll" };
150 PNAME(mux_cifout_p)		= { "sclk_cifout_src", "xin24m" };
151 PNAME(mux_sclk_cif0_src_p)	= { "pclk_vip", "clk_cif0_chn_out", "pclkin_cvbs2cif" };
152 PNAME(mux_sclk_cif1_src_p)	= { "pclk_vip", "clk_cif1_chn_out", "pclkin_cvbs2cif" };
153 PNAME(mux_sclk_cif2_src_p)	= { "pclk_vip", "clk_cif2_chn_out", "pclkin_cvbs2cif" };
154 PNAME(mux_sclk_cif3_src_p)	= { "pclk_vip", "clk_cif3_chn_out", "pclkin_cvbs2cif" };
155 PNAME(mux_dsp_src_p)		= { "dpll", "gpll", "apll", "usb480m" };
156 PNAME(mux_dclk_hdmiphy_p)	= { "hdmiphy", "xin24m" };
157 PNAME(mux_dclk_vop_p)		= { "dclk_hdmiphy", "dclk_vop_src" };
158 PNAME(mux_hdmi_cec_src_p)		= { "dpll", "gpll", "xin24m" };
159 PNAME(mux_cvbs_src_p)		= { "apll", "io_cvbs_clkin", "hdmiphy", "gpll" };