Lines Matching refs:MUX
93 MUX(0, "mout_topc_bus0_pll", mout_topc_bus0_pll_ctrl_p,
95 MUX(0, "mout_topc_bus1_pll", mout_topc_bus1_pll_ctrl_p,
97 MUX(0, "mout_topc_cc_pll", mout_topc_cc_pll_ctrl_p,
99 MUX(0, "mout_topc_mfc_pll", mout_topc_mfc_pll_ctrl_p,
101 MUX(0, "mout_topc_bus0_pll_half", mout_topc_bus0_pll_half_p,
103 MUX(0, "mout_topc_bus1_pll_half", mout_topc_bus1_pll_half_p,
105 MUX(0, "mout_topc_cc_pll_half", mout_topc_cc_pll_half_p,
107 MUX(0, "mout_topc_mfc_pll_half", mout_topc_mfc_pll_half_p,
110 MUX(0, "mout_topc_aud_pll", mout_topc_aud_pll_ctrl_p,
112 MUX(0, "mout_topc_bus0_pll_out", mout_topc_bus0_pll_out_p,
115 MUX(0, "mout_aclk_ccore_133", mout_topc_group2, MUX_SEL_TOPC2, 4, 2),
117 MUX(0, "mout_aclk_mscl_532", mout_topc_group2, MUX_SEL_TOPC3, 20, 2),
118 MUX(0, "mout_aclk_peris_66", mout_topc_group2, MUX_SEL_TOPC3, 24, 2),
279 MUX(0, "mout_top0_aud_pll_user", mout_top0_aud_pll_user_p,
281 MUX(0, "mout_top0_mfc_pll_user", mout_top0_mfc_pll_user_p,
283 MUX(0, "mout_top0_cc_pll_user", mout_top0_cc_pll_user_p,
285 MUX(0, "mout_top0_bus1_pll_user", mout_top0_bus1_pll_user_p,
287 MUX(0, "mout_top0_bus0_pll_user", mout_top0_bus0_pll_user_p,
290 MUX(0, "mout_top0_mfc_pll_half", mout_top0_mfc_pll_half_p,
292 MUX(0, "mout_top0_cc_pll_half", mout_top0_cc_pll_half_p,
294 MUX(0, "mout_top0_bus1_pll_half", mout_top0_bus1_pll_half_p,
296 MUX(0, "mout_top0_bus0_pll_half", mout_top0_bus0_pll_half_p,
299 MUX(0, "mout_aclk_peric1_66", mout_top0_group1, MUX_SEL_TOP03, 12, 2),
300 MUX(0, "mout_aclk_peric0_66", mout_top0_group1, MUX_SEL_TOP03, 20, 2),
302 MUX(0, "mout_sclk_spdif", mout_top0_group3, MUX_SEL_TOP0_PERIC0, 4, 3),
303 MUX(0, "mout_sclk_pcm1", mout_top0_group4, MUX_SEL_TOP0_PERIC0, 8, 2),
304 MUX(0, "mout_sclk_i2s1", mout_top0_group4, MUX_SEL_TOP0_PERIC0, 20, 2),
306 MUX(0, "mout_sclk_spi1", mout_top0_group1, MUX_SEL_TOP0_PERIC1, 8, 2),
307 MUX(0, "mout_sclk_spi0", mout_top0_group1, MUX_SEL_TOP0_PERIC1, 20, 2),
309 MUX(0, "mout_sclk_spi3", mout_top0_group1, MUX_SEL_TOP0_PERIC2, 8, 2),
310 MUX(0, "mout_sclk_spi2", mout_top0_group1, MUX_SEL_TOP0_PERIC2, 20, 2),
311 MUX(0, "mout_sclk_uart3", mout_top0_group1, MUX_SEL_TOP0_PERIC3, 4, 2),
312 MUX(0, "mout_sclk_uart2", mout_top0_group1, MUX_SEL_TOP0_PERIC3, 8, 2),
313 MUX(0, "mout_sclk_uart1", mout_top0_group1, MUX_SEL_TOP0_PERIC3, 12, 2),
314 MUX(0, "mout_sclk_uart0", mout_top0_group1, MUX_SEL_TOP0_PERIC3, 16, 2),
315 MUX(0, "mout_sclk_spi4", mout_top0_group1, MUX_SEL_TOP0_PERIC3, 20, 2),
459 MUX(0, "mout_top1_mfc_pll_user", mout_top1_mfc_pll_user_p,
461 MUX(0, "mout_top1_cc_pll_user", mout_top1_cc_pll_user_p,
463 MUX(0, "mout_top1_bus1_pll_user", mout_top1_bus1_pll_user_p,
465 MUX(0, "mout_top1_bus0_pll_user", mout_top1_bus0_pll_user_p,
468 MUX(0, "mout_top1_mfc_pll_half", mout_top1_mfc_pll_half_p,
470 MUX(0, "mout_top1_cc_pll_half", mout_top1_cc_pll_half_p,
472 MUX(0, "mout_top1_bus1_pll_half", mout_top1_bus1_pll_half_p,
474 MUX(0, "mout_top1_bus0_pll_half", mout_top1_bus0_pll_half_p,
477 MUX(0, "mout_aclk_fsys1_200", mout_top1_group1, MUX_SEL_TOP13, 24, 2),
478 MUX(0, "mout_aclk_fsys0_200", mout_top1_group1, MUX_SEL_TOP13, 28, 2),
480 MUX(0, "mout_sclk_phy_fsys0_26m", mout_top1_group1,
482 MUX(0, "mout_sclk_mmc2", mout_top1_group1, MUX_SEL_TOP1_FSYS0, 16, 2),
483 MUX(0, "mout_sclk_usbdrd300", mout_top1_group1,
486 MUX(0, "mout_sclk_phy_fsys1", mout_top1_group1,
488 MUX(0, "mout_sclk_ufsunipro20", mout_top1_group1,
491 MUX(0, "mout_sclk_mmc1", mout_top1_group1, MUX_SEL_TOP1_FSYS11, 0, 2),
492 MUX(0, "mout_sclk_mmc0", mout_top1_group1, MUX_SEL_TOP1_FSYS11, 12, 2),
493 MUX(0, "mout_sclk_phy_fsys1_26m", mout_top1_group1,
606 MUX(0, "mout_aclk_ccore_133_user", mout_aclk_ccore_133_user_p,
649 MUX(0, "mout_aclk_peric0_66_user", mout_aclk_peric0_66_user_p,
651 MUX(0, "mout_sclk_uart0_user", mout_sclk_uart0_user_p,
727 MUX(0, "mout_aclk_peric1_66_user", mout_aclk_peric1_66_user_p,
740 MUX(0, "mout_sclk_uart1_user", mout_sclk_uart1_user_p,
742 MUX(0, "mout_sclk_uart2_user", mout_sclk_uart2_user_p,
744 MUX(0, "mout_sclk_uart3_user", mout_sclk_uart3_user_p,
843 MUX(0, "mout_aclk_peris_66_user",
919 MUX(0, "mout_aclk_fsys0_200_user", mout_aclk_fsys0_200_user_p,
922 MUX(0, "mout_sclk_mmc2_user", mout_sclk_mmc2_user_p,
924 MUX(0, "mout_sclk_usbdrd300_user", mout_sclk_usbdrd300_user_p,
927 MUX(0, "mout_phyclk_usbdrd300_udrd30_pipe_pclk_user",
930 MUX(0, "mout_phyclk_usbdrd300_udrd30_phyclk_user",
1036 MUX(MOUT_FSYS1_PHYCLK_SEL1, "mout_fsys1_phyclk_sel1",
1038 MUX(0, "mout_fsys1_phyclk_sel0", mout_fsys1_group_p,
1040 MUX(0, "mout_aclk_fsys1_200_user", mout_aclk_fsys1_200_user_p,
1043 MUX(0, "mout_sclk_mmc1_user", mout_sclk_mmc1_user_p,
1045 MUX(0, "mout_sclk_mmc0_user", mout_sclk_mmc0_user_p,
1047 MUX(0, "mout_sclk_ufsunipro20_user", mout_sclk_ufsunipro20_user_p,
1050 MUX(0, "mout_phyclk_ufs20_rx1_symbol_user",
1052 MUX(0, "mout_phyclk_ufs20_rx0_symbol_user",
1054 MUX(0, "mout_phyclk_ufs20_tx0_symbol_user",
1136 MUX(USERMUX_ACLK_MSCL_532, "usermux_aclk_mscl_532",
1257 MUX(0, "mout_sclk_i2s", mout_aud_group_p, MUX_SEL_AUD, 12, 1),
1258 MUX(0, "mout_sclk_pcm", mout_aud_group_p, MUX_SEL_AUD, 16, 1),
1259 MUX(0, "mout_aud_pll_user", mout_aud_pll_user_p, MUX_SEL_AUD, 20, 1),