Lines Matching refs:__initdata
70 static unsigned long s3c64xx_clk_regs[] __initdata = {
87 static unsigned long s3c6410_clk_regs[] __initdata = {
173 FIXED_RATE_CLOCKS(s3c64xx_fixed_rate_ext_clks) __initdata = {
179 FIXED_RATE_CLOCKS(s3c64xx_fixed_rate_clks) __initdata = {
185 MUX_CLOCKS(s3c64xx_mux_clks) __initdata = {
202 MUX_CLOCKS(s3c6400_mux_clks) __initdata = {
210 MUX_CLOCKS(s3c6410_mux_clks) __initdata = {
221 DIV_CLOCKS(s3c64xx_div_clks) __initdata = {
245 DIV_CLOCKS(s3c6400_div_clks) __initdata = {
250 DIV_CLOCKS(s3c6410_div_clks) __initdata = {
257 GATE_CLOCKS(s3c64xx_gate_clks) __initdata = {
337 GATE_CLOCKS(s3c6400_gate_clks) __initdata = {
343 GATE_CLOCKS(s3c6410_gate_clks) __initdata = {
361 static struct samsung_pll_clock s3c64xx_pll_clks[] __initdata = {