Lines Matching refs:hwclk
39 static u8 socfpga_clk_get_parent(struct clk_hw *hwclk) in socfpga_clk_get_parent() argument
44 if (streq(hwclk->init->name, SOCFPGA_L4_MP_CLK)) { in socfpga_clk_get_parent()
48 if (streq(hwclk->init->name, SOCFPGA_L4_SP_CLK)) { in socfpga_clk_get_parent()
54 if (streq(hwclk->init->name, SOCFPGA_MMC_CLK)) in socfpga_clk_get_parent()
56 if (streq(hwclk->init->name, SOCFPGA_NAND_CLK) || in socfpga_clk_get_parent()
57 streq(hwclk->init->name, SOCFPGA_NAND_X_CLK)) in socfpga_clk_get_parent()
65 static int socfpga_clk_set_parent(struct clk_hw *hwclk, u8 parent) in socfpga_clk_set_parent() argument
69 if (streq(hwclk->init->name, SOCFPGA_L4_MP_CLK)) { in socfpga_clk_set_parent()
74 } else if (streq(hwclk->init->name, SOCFPGA_L4_SP_CLK)) { in socfpga_clk_set_parent()
81 if (streq(hwclk->init->name, SOCFPGA_MMC_CLK)) { in socfpga_clk_set_parent()
84 } else if (streq(hwclk->init->name, SOCFPGA_NAND_CLK) || in socfpga_clk_set_parent()
85 streq(hwclk->init->name, SOCFPGA_NAND_X_CLK)) { in socfpga_clk_set_parent()
98 static unsigned long socfpga_clk_recalc_rate(struct clk_hw *hwclk, in socfpga_clk_recalc_rate() argument
101 struct socfpga_gate_clk *socfpgaclk = to_socfpga_gate_clk(hwclk); in socfpga_clk_recalc_rate()
119 static int socfpga_clk_prepare(struct clk_hw *hwclk) in socfpga_clk_prepare() argument
121 struct socfpga_gate_clk *socfpgaclk = to_socfpga_gate_clk(hwclk); in socfpga_clk_prepare()