Lines Matching refs:val_aux
2210 u32 val, val_aux; in tegra_clk_register_plle_tegra114() local
2219 val_aux = pll_readl(pll_params->aux_reg, pll); in tegra_clk_register_plle_tegra114()
2222 if ((val_aux & PLLE_AUX_PLLRE_SEL) || in tegra_clk_register_plle_tegra114()
2223 (val_aux & PLLE_AUX_PLLP_SEL)) in tegra_clk_register_plle_tegra114()
2225 (val_aux & PLLE_AUX_PLLP_SEL) ? "pllp_out0" : in tegra_clk_register_plle_tegra114()
2228 val_aux &= ~(PLLE_AUX_PLLRE_SEL | PLLE_AUX_PLLP_SEL); in tegra_clk_register_plle_tegra114()
2229 pll_writel(val_aux, pll_params->aux_reg, pll); in tegra_clk_register_plle_tegra114()
2526 u32 val, val_aux; in tegra_clk_register_plle_tegra210() local
2535 val_aux = pll_readl(pll_params->aux_reg, pll); in tegra_clk_register_plle_tegra210()
2538 if ((val_aux & PLLE_AUX_PLLRE_SEL) || in tegra_clk_register_plle_tegra210()
2539 (val_aux & PLLE_AUX_PLLP_SEL)) in tegra_clk_register_plle_tegra210()
2541 (val_aux & PLLE_AUX_PLLP_SEL) ? "pllp_out0" : in tegra_clk_register_plle_tegra210()
2544 val_aux &= ~(PLLE_AUX_PLLRE_SEL | PLLE_AUX_PLLP_SEL); in tegra_clk_register_plle_tegra210()
2545 pll_writel(val_aux, pll_params->aux_reg, pll); in tegra_clk_register_plle_tegra210()