Lines Matching refs:DT_CLK
703 DT_CLK(NULL, "timer_32k_ck", "sys_32k_ck"),
709 DT_CLK(NULL, "aess_fclk", "abe_cm:0008:24"),
710 DT_CLK(NULL, "cm2_dm10_mux", "l4_per_cm:0008:24"),
711 DT_CLK(NULL, "cm2_dm11_mux", "l4_per_cm:0010:24"),
712 DT_CLK(NULL, "cm2_dm2_mux", "l4_per_cm:0018:24"),
713 DT_CLK(NULL, "cm2_dm3_mux", "l4_per_cm:0020:24"),
714 DT_CLK(NULL, "cm2_dm4_mux", "l4_per_cm:0028:24"),
715 DT_CLK(NULL, "cm2_dm9_mux", "l4_per_cm:0030:24"),
716 DT_CLK(NULL, "dmic_sync_mux_ck", "abe_cm:0018:26"),
717 DT_CLK(NULL, "dmt1_clk_mux", "l4_wkup_cm:0020:24"),
718 DT_CLK(NULL, "dss_48mhz_clk", "l3_dss_cm:0000:9"),
719 DT_CLK(NULL, "dss_dss_clk", "l3_dss_cm:0000:8"),
720 DT_CLK(NULL, "dss_sys_clk", "l3_dss_cm:0000:10"),
721 DT_CLK(NULL, "dss_tv_clk", "l3_dss_cm:0000:11"),
722 DT_CLK(NULL, "fdif_fck", "iss_cm:0008:24"),
723 DT_CLK(NULL, "func_dmic_abe_gfclk", "abe_cm:0018:24"),
724 DT_CLK(NULL, "func_mcasp_abe_gfclk", "abe_cm:0020:24"),
725 DT_CLK(NULL, "func_mcbsp1_gfclk", "abe_cm:0028:24"),
726 DT_CLK(NULL, "func_mcbsp2_gfclk", "abe_cm:0030:24"),
727 DT_CLK(NULL, "func_mcbsp3_gfclk", "abe_cm:0038:24"),
728 DT_CLK(NULL, "gpio1_dbclk", "l4_wkup_cm:0018:8"),
729 DT_CLK(NULL, "gpio2_dbclk", "l4_per_cm:0040:8"),
730 DT_CLK(NULL, "gpio3_dbclk", "l4_per_cm:0048:8"),
731 DT_CLK(NULL, "gpio4_dbclk", "l4_per_cm:0050:8"),
732 DT_CLK(NULL, "gpio5_dbclk", "l4_per_cm:0058:8"),
733 DT_CLK(NULL, "gpio6_dbclk", "l4_per_cm:0060:8"),
734 DT_CLK(NULL, "hsi_fck", "l3_init_cm:0018:24"),
735 DT_CLK(NULL, "hsmmc1_fclk", "l3_init_cm:0008:24"),
736 DT_CLK(NULL, "hsmmc2_fclk", "l3_init_cm:0010:24"),
737 DT_CLK(NULL, "iss_ctrlclk", "iss_cm:0000:8"),
738 DT_CLK(NULL, "mcasp_sync_mux_ck", "abe_cm:0020:26"),
739 DT_CLK(NULL, "mcbsp1_sync_mux_ck", "abe_cm:0028:26"),
740 DT_CLK(NULL, "mcbsp2_sync_mux_ck", "abe_cm:0030:26"),
741 DT_CLK(NULL, "mcbsp3_sync_mux_ck", "abe_cm:0038:26"),
742 DT_CLK(NULL, "mcbsp4_sync_mux_ck", "l4_per_cm:00c0:26"),
743 DT_CLK(NULL, "ocp2scp_usb_phy_phy_48m", "l3_init_cm:00c0:8"),
744 DT_CLK(NULL, "otg_60m_gfclk", "l3_init_cm:0040:24"),
745 DT_CLK(NULL, "per_mcbsp4_gfclk", "l4_per_cm:00c0:24"),
746 DT_CLK(NULL, "pmd_stm_clock_mux_ck", "emu_sys_cm:0000:20"),
747 DT_CLK(NULL, "pmd_trace_clk_mux_ck", "emu_sys_cm:0000:22"),
748 DT_CLK(NULL, "sgx_clk_mux", "l3_gfx_cm:0000:24"),
749 DT_CLK(NULL, "slimbus1_fclk_0", "abe_cm:0040:8"),
750 DT_CLK(NULL, "slimbus1_fclk_1", "abe_cm:0040:9"),
751 DT_CLK(NULL, "slimbus1_fclk_2", "abe_cm:0040:10"),
752 DT_CLK(NULL, "slimbus1_slimbus_clk", "abe_cm:0040:11"),
753 DT_CLK(NULL, "slimbus2_fclk_0", "l4_per_cm:0118:8"),
754 DT_CLK(NULL, "slimbus2_fclk_1", "l4_per_cm:0118:9"),
755 DT_CLK(NULL, "slimbus2_slimbus_clk", "l4_per_cm:0118:10"),
756 DT_CLK(NULL, "stm_clk_div_ck", "emu_sys_cm:0000:27"),
757 DT_CLK(NULL, "timer5_sync_mux", "abe_cm:0048:24"),
758 DT_CLK(NULL, "timer6_sync_mux", "abe_cm:0050:24"),
759 DT_CLK(NULL, "timer7_sync_mux", "abe_cm:0058:24"),
760 DT_CLK(NULL, "timer8_sync_mux", "abe_cm:0060:24"),
761 DT_CLK(NULL, "trace_clk_div_div_ck", "emu_sys_cm:0000:24"),
762 DT_CLK(NULL, "usb_host_hs_func48mclk", "l3_init_cm:0038:15"),
763 DT_CLK(NULL, "usb_host_hs_hsic480m_p1_clk", "l3_init_cm:0038:13"),
764 DT_CLK(NULL, "usb_host_hs_hsic480m_p2_clk", "l3_init_cm:0038:14"),
765 DT_CLK(NULL, "usb_host_hs_hsic60m_p1_clk", "l3_init_cm:0038:11"),
766 DT_CLK(NULL, "usb_host_hs_hsic60m_p2_clk", "l3_init_cm:0038:12"),
767 DT_CLK(NULL, "usb_host_hs_utmi_p1_clk", "l3_init_cm:0038:8"),
768 DT_CLK(NULL, "usb_host_hs_utmi_p2_clk", "l3_init_cm:0038:9"),
769 DT_CLK(NULL, "usb_host_hs_utmi_p3_clk", "l3_init_cm:0038:10"),
770 DT_CLK(NULL, "usb_otg_hs_xclk", "l3_init_cm:0040:8"),
771 DT_CLK(NULL, "usb_tll_hs_usb_ch0_clk", "l3_init_cm:0048:8"),
772 DT_CLK(NULL, "usb_tll_hs_usb_ch1_clk", "l3_init_cm:0048:9"),
773 DT_CLK(NULL, "usb_tll_hs_usb_ch2_clk", "l3_init_cm:0048:10"),
774 DT_CLK(NULL, "utmi_p1_gfclk", "l3_init_cm:0038:24"),
775 DT_CLK(NULL, "utmi_p2_gfclk", "l3_init_cm:0038:25"),