Lines Matching refs:TI_CLK_MUX

76 	{ 24, TI_CLK_MUX, omap4_func_dmic_abe_gfclk_parents, NULL },
77 { 26, TI_CLK_MUX, omap4_dmic_sync_mux_ck_parents, NULL },
89 { 24, TI_CLK_MUX, omap4_func_mcasp_abe_gfclk_parents, NULL },
90 { 26, TI_CLK_MUX, omap4_dmic_sync_mux_ck_parents, NULL },
102 { 24, TI_CLK_MUX, omap4_func_mcbsp1_gfclk_parents, NULL },
103 { 26, TI_CLK_MUX, omap4_dmic_sync_mux_ck_parents, NULL },
115 { 24, TI_CLK_MUX, omap4_func_mcbsp2_gfclk_parents, NULL },
116 { 26, TI_CLK_MUX, omap4_dmic_sync_mux_ck_parents, NULL },
128 { 24, TI_CLK_MUX, omap4_func_mcbsp3_gfclk_parents, NULL },
129 { 26, TI_CLK_MUX, omap4_dmic_sync_mux_ck_parents, NULL },
168 { 24, TI_CLK_MUX, omap4_timer5_sync_mux_parents, NULL },
173 { 24, TI_CLK_MUX, omap4_timer5_sync_mux_parents, NULL },
178 { 24, TI_CLK_MUX, omap4_timer5_sync_mux_parents, NULL },
183 { 24, TI_CLK_MUX, omap4_timer5_sync_mux_parents, NULL },
337 { 24, TI_CLK_MUX, omap4_sgx_clk_mux_parents, NULL },
353 { 24, TI_CLK_MUX, omap4_hsmmc1_fclk_parents, NULL },
358 { 24, TI_CLK_MUX, omap4_hsmmc1_fclk_parents, NULL },
418 { 24, TI_CLK_MUX, omap4_utmi_p1_gfclk_parents, NULL },
419 { 25, TI_CLK_MUX, omap4_utmi_p2_gfclk_parents, NULL },
436 { 24, TI_CLK_MUX, omap4_otg_60m_gfclk_parents, NULL },
476 { 24, TI_CLK_MUX, omap4_cm2_dm10_mux_parents, NULL },
481 { 24, TI_CLK_MUX, omap4_cm2_dm10_mux_parents, NULL },
486 { 24, TI_CLK_MUX, omap4_cm2_dm10_mux_parents, NULL },
491 { 24, TI_CLK_MUX, omap4_cm2_dm10_mux_parents, NULL },
496 { 24, TI_CLK_MUX, omap4_cm2_dm10_mux_parents, NULL },
501 { 24, TI_CLK_MUX, omap4_cm2_dm10_mux_parents, NULL },
548 { 24, TI_CLK_MUX, omap4_per_mcbsp4_gfclk_parents, NULL },
549 { 26, TI_CLK_MUX, omap4_mcbsp4_sync_mux_ck_parents, NULL },
616 { 24, TI_CLK_MUX, omap4_cm2_dm10_mux_parents, NULL },
666 { 20, TI_CLK_MUX, omap4_pmd_stm_clock_mux_ck_parents, NULL },
667 { 22, TI_CLK_MUX, omap4_pmd_stm_clock_mux_ck_parents, NULL },