clk/ti/clk-54xx.c

56 	{ 24, TI_CLK_MUX, omap5_dmic_gfclk_parents, NULL },
57 	{ 26, TI_CLK_MUX, omap5_dmic_sync_mux_ck_parents, NULL },
69 	{ 24, TI_CLK_MUX, omap5_mcbsp1_gfclk_parents, NULL },
70 	{ 26, TI_CLK_MUX, omap5_dmic_sync_mux_ck_parents, NULL },
82 	{ 24, TI_CLK_MUX, omap5_mcbsp2_gfclk_parents, NULL },
83 	{ 26, TI_CLK_MUX, omap5_dmic_sync_mux_ck_parents, NULL },
95 	{ 24, TI_CLK_MUX, omap5_mcbsp3_gfclk_parents, NULL },
96 	{ 26, TI_CLK_MUX, omap5_dmic_sync_mux_ck_parents, NULL },
107 	{ 24, TI_CLK_MUX, omap5_timer5_gfclk_mux_parents, NULL },
112 	{ 24, TI_CLK_MUX, omap5_timer5_gfclk_mux_parents, NULL },
117 	{ 24, TI_CLK_MUX, omap5_timer5_gfclk_mux_parents, NULL },
122 	{ 24, TI_CLK_MUX, omap5_timer5_gfclk_mux_parents, NULL },
187 	{ 24, TI_CLK_MUX, omap5_timer10_gfclk_mux_parents, NULL },
192 	{ 24, TI_CLK_MUX, omap5_timer10_gfclk_mux_parents, NULL },
197 	{ 24, TI_CLK_MUX, omap5_timer10_gfclk_mux_parents, NULL },
202 	{ 24, TI_CLK_MUX, omap5_timer10_gfclk_mux_parents, NULL },
207 	{ 24, TI_CLK_MUX, omap5_timer10_gfclk_mux_parents, NULL },
212 	{ 24, TI_CLK_MUX, omap5_timer10_gfclk_mux_parents, NULL },
337 	{ 24, TI_CLK_MUX, omap5_mmc1_fclk_mux_parents, NULL },
352 	{ 24, TI_CLK_MUX, omap5_mmc1_fclk_mux_parents, NULL },
399 	{ 24, TI_CLK_MUX, omap5_utmi_p1_gfclk_parents, NULL },
400 	{ 25, TI_CLK_MUX, omap5_utmi_p2_gfclk_parents, NULL },
449 	{ 24, TI_CLK_MUX, omap5_timer10_gfclk_mux_parents, NULL },