Lines Matching refs:dra7_dss_32khz_clk_parents
219 static const char * const dra7_dss_32khz_clk_parents[] __initconst = { variable
238 { 11, TI_CLK_GATE, dra7_dss_32khz_clk_parents, NULL },
267 { 8, TI_CLK_GATE, dra7_dss_32khz_clk_parents, NULL },
284 { 8, TI_CLK_GATE, dra7_dss_32khz_clk_parents, NULL },
321 { 8, TI_CLK_GATE, dra7_dss_32khz_clk_parents, NULL },
328 { 8, TI_CLK_GATE, dra7_dss_32khz_clk_parents, NULL },
422 { 8, TI_CLK_GATE, dra7_dss_32khz_clk_parents, NULL },
427 { 8, TI_CLK_GATE, dra7_dss_32khz_clk_parents, NULL },
432 { 8, TI_CLK_GATE, dra7_dss_32khz_clk_parents, NULL },
437 { 8, TI_CLK_GATE, dra7_dss_32khz_clk_parents, NULL },
442 { 8, TI_CLK_GATE, dra7_dss_32khz_clk_parents, NULL },
462 { 8, TI_CLK_GATE, dra7_dss_32khz_clk_parents, NULL },
467 { 8, TI_CLK_GATE, dra7_dss_32khz_clk_parents, NULL },
482 { 8, TI_CLK_GATE, dra7_dss_32khz_clk_parents, NULL },
499 { 8, TI_CLK_GATE, dra7_dss_32khz_clk_parents, NULL },
677 { 8, TI_CLK_GATE, dra7_dss_32khz_clk_parents, NULL },