Lines Matching refs:dev_err
371 dev_err(edac->dev, "no MCU resource address\n"); in xgene_edac_mc_add()
376 dev_err(edac->dev, "unable to map MCU resource\n"); in xgene_edac_mc_add()
383 dev_err(edac->dev, "no memory-controller property\n"); in xgene_edac_mc_add()
426 dev_err(edac->dev, "edac_mc_add_mc failed\n"); in xgene_edac_mc_add()
543 dev_err(edac_dev->dev, in xgene_edac_pmd_l1_check()
550 dev_err(edac_dev->dev, "One or more correctable error\n"); in xgene_edac_pmd_l1_check()
552 dev_err(edac_dev->dev, "Multiple correctable error\n"); in xgene_edac_pmd_l1_check()
555 dev_err(edac_dev->dev, "L1 TLB multiple hit\n"); in xgene_edac_pmd_l1_check()
558 dev_err(edac_dev->dev, "Way select multiple hit\n"); in xgene_edac_pmd_l1_check()
561 dev_err(edac_dev->dev, "Physical tag parity error\n"); in xgene_edac_pmd_l1_check()
565 dev_err(edac_dev->dev, "L1 data parity error\n"); in xgene_edac_pmd_l1_check()
568 dev_err(edac_dev->dev, "L1 pre-decode parity error\n"); in xgene_edac_pmd_l1_check()
583 dev_err(edac_dev->dev, in xgene_edac_pmd_l1_check()
590 dev_err(edac_dev->dev, "One or more correctable error\n"); in xgene_edac_pmd_l1_check()
592 dev_err(edac_dev->dev, "Multiple correctable error\n"); in xgene_edac_pmd_l1_check()
595 dev_err(edac_dev->dev, "Load tag error\n"); in xgene_edac_pmd_l1_check()
598 dev_err(edac_dev->dev, "Load data error\n"); in xgene_edac_pmd_l1_check()
601 dev_err(edac_dev->dev, "WSL multihit error\n"); in xgene_edac_pmd_l1_check()
604 dev_err(edac_dev->dev, "Store tag error\n"); in xgene_edac_pmd_l1_check()
607 dev_err(edac_dev->dev, in xgene_edac_pmd_l1_check()
611 dev_err(edac_dev->dev, in xgene_edac_pmd_l1_check()
627 dev_err(edac_dev->dev, in xgene_edac_pmd_l1_check()
635 dev_err(edac_dev->dev, "One or more correctable error\n"); in xgene_edac_pmd_l1_check()
637 dev_err(edac_dev->dev, "Multiple correctable error\n"); in xgene_edac_pmd_l1_check()
640 dev_err(edac_dev->dev, "Stage 1 UTB hit error\n"); in xgene_edac_pmd_l1_check()
643 dev_err(edac_dev->dev, "Stage 1 UTB miss error\n"); in xgene_edac_pmd_l1_check()
646 dev_err(edac_dev->dev, "Stage 1 UTB allocate error\n"); in xgene_edac_pmd_l1_check()
649 dev_err(edac_dev->dev, "TMO operation single bank error\n"); in xgene_edac_pmd_l1_check()
652 dev_err(edac_dev->dev, "Stage 2 UTB error\n"); in xgene_edac_pmd_l1_check()
655 dev_err(edac_dev->dev, "Stage 2 UTB miss error\n"); in xgene_edac_pmd_l1_check()
658 dev_err(edac_dev->dev, "Stage 2 UTB allocate error\n"); in xgene_edac_pmd_l1_check()
661 dev_err(edac_dev->dev, "TMO operation multiple bank error\n"); in xgene_edac_pmd_l1_check()
687 dev_err(edac_dev->dev, in xgene_edac_pmd_l2_check()
690 dev_err(edac_dev->dev, in xgene_edac_pmd_l2_check()
699 dev_err(edac_dev->dev, "One or more correctable error\n"); in xgene_edac_pmd_l2_check()
701 dev_err(edac_dev->dev, "Multiple correctable error\n"); in xgene_edac_pmd_l2_check()
703 dev_err(edac_dev->dev, "One or more uncorrectable error\n"); in xgene_edac_pmd_l2_check()
705 dev_err(edac_dev->dev, "Multiple uncorrectable error\n"); in xgene_edac_pmd_l2_check()
709 dev_err(edac_dev->dev, "Outbound SDB parity error\n"); in xgene_edac_pmd_l2_check()
712 dev_err(edac_dev->dev, "Inbound SDB parity error\n"); in xgene_edac_pmd_l2_check()
715 dev_err(edac_dev->dev, "Tag ECC error\n"); in xgene_edac_pmd_l2_check()
718 dev_err(edac_dev->dev, "Data ECC error\n"); in xgene_edac_pmd_l2_check()
739 dev_err(edac_dev->dev, in xgene_edac_pmd_l2_check()
914 dev_err(edac->dev, "no pmd-controller property\n"); in xgene_edac_pmd_add()
949 dev_err(edac->dev, "no PMD resource address\n"); in xgene_edac_pmd_add()
954 dev_err(edac->dev, in xgene_edac_pmd_add()
967 dev_err(edac->dev, "edac_device_add_device failed\n"); in xgene_edac_pmd_add()
1078 dev_err(edac_dev->dev, "L3C uncorrectable error\n"); in xgene_edac_l3_check()
1086 dev_err(edac_dev->dev, "L3C multiple hit error\n"); in xgene_edac_l3_check()
1088 dev_err(edac_dev->dev, in xgene_edac_l3_check()
1091 dev_err(edac_dev->dev, "L3C multiple uncorrectable error\n"); in xgene_edac_l3_check()
1093 dev_err(edac_dev->dev, in xgene_edac_l3_check()
1097 dev_err(edac_dev->dev, in xgene_edac_l3_check()
1105 dev_err(edac_dev->dev, "L3C error address 0x%08X.%08X bank %d\n", in xgene_edac_l3_check()
1108 dev_err(edac_dev->dev, in xgene_edac_l3_check()
1210 dev_err(edac->dev, "no L3 resource address\n"); in xgene_edac_l3_add()
1215 dev_err(edac->dev, in xgene_edac_l3_add()
1250 dev_err(edac->dev, "failed edac_device_add_device()\n"); in xgene_edac_l3_add()
1413 dev_err(edac_dev->dev, "XGIC transaction error\n"); in xgene_edac_iob_gic_report()
1415 dev_err(edac_dev->dev, "XGIC read size error\n"); in xgene_edac_iob_gic_report()
1417 dev_err(edac_dev->dev, "Multiple XGIC read size error\n"); in xgene_edac_iob_gic_report()
1419 dev_err(edac_dev->dev, "XGIC write size error\n"); in xgene_edac_iob_gic_report()
1421 dev_err(edac_dev->dev, "Multiple XGIC write size error\n"); in xgene_edac_iob_gic_report()
1423 dev_err(edac_dev->dev, "XGIC %s access @ 0x%08X (0x%08X)\n", in xgene_edac_iob_gic_report()
1436 dev_err(edac_dev->dev, in xgene_edac_iob_gic_report()
1445 dev_err(edac_dev->dev, in xgene_edac_iob_gic_report()
1457 dev_err(edac_dev->dev, in xgene_edac_iob_gic_report()
1466 dev_err(edac_dev->dev, in xgene_edac_iob_gic_report()
1500 dev_err(edac_dev->dev, "IOB bus access error(s)\n"); in xgene_edac_rb_report()
1506 dev_err(edac_dev->dev, in xgene_edac_rb_report()
1510 dev_err(edac_dev->dev, in xgene_edac_rb_report()
1514 dev_err(edac_dev->dev, in xgene_edac_rb_report()
1518 dev_err(edac_dev->dev, in xgene_edac_rb_report()
1533 dev_err(edac_dev->dev, "IOB bridge agent (BA) transaction error\n"); in xgene_edac_rb_report()
1535 dev_err(edac_dev->dev, "IOB BA write response error\n"); in xgene_edac_rb_report()
1537 dev_err(edac_dev->dev, in xgene_edac_rb_report()
1540 dev_err(edac_dev->dev, "IOB BA XGIC poisoned write error\n"); in xgene_edac_rb_report()
1542 dev_err(edac_dev->dev, in xgene_edac_rb_report()
1545 dev_err(edac_dev->dev, "IOB BA RBM poisoned write error\n"); in xgene_edac_rb_report()
1547 dev_err(edac_dev->dev, in xgene_edac_rb_report()
1550 dev_err(edac_dev->dev, "IOB BA write error\n"); in xgene_edac_rb_report()
1552 dev_err(edac_dev->dev, "Multiple IOB BA write error\n"); in xgene_edac_rb_report()
1554 dev_err(edac_dev->dev, "IOB BA transaction error\n"); in xgene_edac_rb_report()
1556 dev_err(edac_dev->dev, "Multiple IOB BA transaction error\n"); in xgene_edac_rb_report()
1558 dev_err(edac_dev->dev, in xgene_edac_rb_report()
1561 dev_err(edac_dev->dev, in xgene_edac_rb_report()
1564 dev_err(edac_dev->dev, in xgene_edac_rb_report()
1567 dev_err(edac_dev->dev, in xgene_edac_rb_report()
1570 dev_err(edac_dev->dev, in xgene_edac_rb_report()
1573 dev_err(edac_dev->dev, in xgene_edac_rb_report()
1578 dev_err(edac_dev->dev, "IOB BA %s access at 0x%02X.%08X (0x%08X)\n", in xgene_edac_rb_report()
1582 dev_err(edac_dev->dev, "IOB BA requestor ID 0x%08X\n", in xgene_edac_rb_report()
1598 dev_err(edac_dev->dev, "IOB processing agent (PA) transaction error\n"); in xgene_edac_pa_report()
1600 dev_err(edac_dev->dev, "IOB PA read data RAM error\n"); in xgene_edac_pa_report()
1602 dev_err(edac_dev->dev, in xgene_edac_pa_report()
1605 dev_err(edac_dev->dev, "IOB PA write data RAM error\n"); in xgene_edac_pa_report()
1607 dev_err(edac_dev->dev, in xgene_edac_pa_report()
1610 dev_err(edac_dev->dev, "IOB PA transaction error\n"); in xgene_edac_pa_report()
1612 dev_err(edac_dev->dev, "Multiple IOB PA transaction error\n"); in xgene_edac_pa_report()
1614 dev_err(edac_dev->dev, "IOB PA transaction ID RAM error\n"); in xgene_edac_pa_report()
1616 dev_err(edac_dev->dev, in xgene_edac_pa_report()
1627 dev_err(edac_dev->dev, in xgene_edac_pa_report()
1641 dev_err(edac_dev->dev, in xgene_edac_pa_report()
1686 dev_err(edac_dev->dev, "SoC memory parity error 0x%08X\n", in xgene_edac_soc_check()
1693 dev_err(edac_dev->dev, "%s memory parity error\n", in xgene_edac_soc_check()
1753 dev_err(edac->dev, "no SoC resource address\n"); in xgene_edac_soc_add()
1758 dev_err(edac->dev, in xgene_edac_soc_add()
1791 dev_err(edac->dev, "failed edac_device_add_device()\n"); in xgene_edac_soc_add()
1882 dev_err(edac->dev, "unable to get syscon regmap csw\n"); in xgene_edac_probe()
1890 dev_err(edac->dev, "unable to get syscon regmap mcba\n"); in xgene_edac_probe()
1898 dev_err(edac->dev, "unable to get syscon regmap mcbb\n"); in xgene_edac_probe()
1905 dev_err(edac->dev, "unable to get syscon regmap efuse\n"); in xgene_edac_probe()
1924 dev_err(&pdev->dev, "no PCP resource address\n"); in xgene_edac_probe()
1936 dev_err(&pdev->dev, "No IRQ resource\n"); in xgene_edac_probe()
1944 dev_err(&pdev->dev, in xgene_edac_probe()