Lines Matching refs:l1m
521 FsmEvent(&isac->l1m, (val >> 2) & 0xf, NULL); in isac_cisq_interrupt()
651 FsmEvent(&isac->l1m, val >> 4, NULL); in isacsx_cic_interrupt()
760 isac->l1m.fsm = &l1fsm; in isac_init()
761 isac->l1m.state = ST_L1_RESET; in isac_init()
763 isac->l1m.debug = 1; in isac_init()
765 isac->l1m.debug = 0; in isac_init()
767 isac->l1m.userdata = isac; in isac_init()
768 isac->l1m.printdebug = l1m_debug; in isac_init()
769 FsmInitTimer(&isac->l1m, &isac->timer); in isac_init()
816 FsmEvent(&isac->l1m, (val >> 2) & 0xf, NULL); in isac_setup()
848 FsmEvent(&isac->l1m, EV_PH_ACTIVATE_REQ, NULL); in isac_d_l2l1()
851 FsmEvent(&isac->l1m, EV_PH_DEACTIVATE_REQ, NULL); in isac_d_l2l1()
856 if (isac->l1m.state != ST_L1_F7) { in isac_d_l2l1()
857 DBG(1, "L1 wrong state %d\n", isac->l1m.state); in isac_d_l2l1()