56 static u16 dib3000mc_read_word(struct dib3000mc_state *state, u16 reg)  in dib3000mc_read_word()  argument
59 		{ .addr = state->i2c_addr >> 1, .flags = 0,        .len = 2 },  in dib3000mc_read_word()
60 		{ .addr = state->i2c_addr >> 1, .flags = I2C_M_RD, .len = 2 },  in dib3000mc_read_word()
77 	if (i2c_transfer(state->i2c_adap, msg, 2) != 2)  in dib3000mc_read_word()
86 static int dib3000mc_write_word(struct dib3000mc_state *state, u16 reg, u16 val)  in dib3000mc_write_word()  argument
89 		.addr = state->i2c_addr >> 1, .flags = 0, .len = 4  in dib3000mc_write_word()
105 	rc = i2c_transfer(state->i2c_adap, &msg, 1) != 1 ? -EREMOTEIO : 0;  in dib3000mc_write_word()
111 static int dib3000mc_identify(struct dib3000mc_state *state)  in dib3000mc_identify()  argument
114 	if ((value = dib3000mc_read_word(state, 1025)) != 0x01b3) {  in dib3000mc_identify()
119 	value = dib3000mc_read_word(state, 1026);  in dib3000mc_identify()
124 	state->dev_id = value;  in dib3000mc_identify()
126 	dprintk("-I-  found DiB3000MC/P: %x\n",state->dev_id);  in dib3000mc_identify()
131 static int dib3000mc_set_timing(struct dib3000mc_state *state, s16 nfft, u32 bw, u8 update_offset)  in dib3000mc_set_timing()  argument
135 	if (state->timf == 0) {  in dib3000mc_set_timing()
140 		timf = state->timf;  in dib3000mc_set_timing()
145 		s16 tim_offs = dib3000mc_read_word(state, 416);  in dib3000mc_set_timing()
154 		state->timf = timf / (bw / 1000);  in dib3000mc_set_timing()
159 	dib3000mc_write_word(state, 23, (u16) (timf >> 16));  in dib3000mc_set_timing()
160 	dib3000mc_write_word(state, 24, (u16) (timf      ) & 0xffff);  in dib3000mc_set_timing()
165 static int dib3000mc_setup_pwm_state(struct dib3000mc_state *state)  in dib3000mc_setup_pwm_state()  argument
167 	u16 reg_51, reg_52 = state->cfg->agc->setup & 0xfefb;  in dib3000mc_setup_pwm_state()
168 	if (state->cfg->pwm3_inversion) {  in dib3000mc_setup_pwm_state()
175 	dib3000mc_write_word(state, 51, reg_51);  in dib3000mc_setup_pwm_state()
176 	dib3000mc_write_word(state, 52, reg_52);  in dib3000mc_setup_pwm_state()
178 	if (state->cfg->use_pwm3)  in dib3000mc_setup_pwm_state()
179 		dib3000mc_write_word(state, 245, (1 << 3) | (1 << 0));  in dib3000mc_setup_pwm_state()
181 		dib3000mc_write_word(state, 245, 0);  in dib3000mc_setup_pwm_state()
183 	dib3000mc_write_word(state, 1040, 0x3);  in dib3000mc_setup_pwm_state()
187 static int dib3000mc_set_output_mode(struct dib3000mc_state *state, int mode)  in dib3000mc_set_output_mode()  argument
194 	u16 smo_reg = dib3000mc_read_word(state, 206) & 0x0010; /* keep the pid_parse bit */  in dib3000mc_set_output_mode()
197 			&state->demod, mode);  in dib3000mc_set_output_mode()
231 			dprintk("Unhandled output_mode passed to be set for demod %p\n",&state->demod);  in dib3000mc_set_output_mode()
236 	if ((state->cfg->output_mpeg2_in_188_bytes))  in dib3000mc_set_output_mode()
239 	outreg = dib3000mc_read_word(state, 244) & 0x07FF;  in dib3000mc_set_output_mode()
241 	ret |= dib3000mc_write_word(state,  244, outreg);  in dib3000mc_set_output_mode()
242 	ret |= dib3000mc_write_word(state,  206, smo_reg);   /*smo_ mode*/  in dib3000mc_set_output_mode()
243 	ret |= dib3000mc_write_word(state,  207, fifo_threshold); /* synchronous fread */  in dib3000mc_set_output_mode()
244 	ret |= dib3000mc_write_word(state, 1040, elecout);         /* P_out_cfg */  in dib3000mc_set_output_mode()
248 static int dib3000mc_set_bandwidth(struct dib3000mc_state *state, u32 bw)  in dib3000mc_set_bandwidth()  argument
280 		dib3000mc_write_word(state, reg, bw_cfg[reg - 6]);  in dib3000mc_set_bandwidth()
281 	dib3000mc_write_word(state, 12, 0x0000);  in dib3000mc_set_bandwidth()
282 	dib3000mc_write_word(state, 13, 0x03e8);  in dib3000mc_set_bandwidth()
283 	dib3000mc_write_word(state, 14, 0x0000);  in dib3000mc_set_bandwidth()
284 	dib3000mc_write_word(state, 15, 0x03f2);  in dib3000mc_set_bandwidth()
285 	dib3000mc_write_word(state, 16, 0x0001);  in dib3000mc_set_bandwidth()
286 	dib3000mc_write_word(state, 17, 0xb0d0);  in dib3000mc_set_bandwidth()
288 	dib3000mc_write_word(state, 18, 0x0393);  in dib3000mc_set_bandwidth()
289 	dib3000mc_write_word(state, 19, 0x8700);  in dib3000mc_set_bandwidth()
292 		dib3000mc_write_word(state, reg, imp_bw_cfg[reg - 55]);  in dib3000mc_set_bandwidth()
295 	dib3000mc_set_timing(state, TRANSMISSION_MODE_2K, bw, 0);  in dib3000mc_set_bandwidth()
308 static void dib3000mc_set_impulse_noise(struct dib3000mc_state *state, u8 mode, s16 nfft)  in dib3000mc_set_impulse_noise()  argument
312 		dib3000mc_write_word(state, i, impulse_noise_val[i-58]);  in dib3000mc_set_impulse_noise()
315 		dib3000mc_write_word(state, 58, 0x3b);  in dib3000mc_set_impulse_noise()
316 		dib3000mc_write_word(state, 84, 0x00);  in dib3000mc_set_impulse_noise()
317 		dib3000mc_write_word(state, 85, 0x8200);  in dib3000mc_set_impulse_noise()
320 	dib3000mc_write_word(state, 34, 0x1294);  in dib3000mc_set_impulse_noise()
321 	dib3000mc_write_word(state, 35, 0x1ff8);  in dib3000mc_set_impulse_noise()
323 		dib3000mc_write_word(state, 55, dib3000mc_read_word(state, 55) | (1 << 10));  in dib3000mc_set_impulse_noise()
328 	struct dib3000mc_state *state = demod->demodulator_priv;  in dib3000mc_init()  local
329 	struct dibx000_agc_config *agc = state->cfg->agc;  in dib3000mc_init()
332 	dib3000mc_write_word(state, 1027, 0x8000);  in dib3000mc_init()
333 	dib3000mc_write_word(state, 1027, 0x0000);  in dib3000mc_init()
336 	dib3000mc_write_word(state, 140, 0x0000);  in dib3000mc_init()
337 	dib3000mc_write_word(state, 1031, 0);  in dib3000mc_init()
339 	if (state->cfg->mobile_mode) {  in dib3000mc_init()
340 		dib3000mc_write_word(state, 139,  0x0000);  in dib3000mc_init()
341 		dib3000mc_write_word(state, 141,  0x0000);  in dib3000mc_init()
342 		dib3000mc_write_word(state, 175,  0x0002);  in dib3000mc_init()
343 		dib3000mc_write_word(state, 1032, 0x0000);  in dib3000mc_init()
345 		dib3000mc_write_word(state, 139,  0x0001);  in dib3000mc_init()
346 		dib3000mc_write_word(state, 141,  0x0000);  in dib3000mc_init()
347 		dib3000mc_write_word(state, 175,  0x0000);  in dib3000mc_init()
348 		dib3000mc_write_word(state, 1032, 0x012C);  in dib3000mc_init()
350 	dib3000mc_write_word(state, 1033, 0x0000);  in dib3000mc_init()
353 	dib3000mc_write_word(state, 1037, 0x3130);  in dib3000mc_init()
358 	dib3000mc_write_word(state, 33, (5 << 0));  in dib3000mc_init()
359 	dib3000mc_write_word(state, 88, (1 << 10) | (0x10 << 0));  in dib3000mc_init()
363 	dib3000mc_write_word(state, 99, (1 << 9) | (0x20 << 0));  in dib3000mc_init()
365 	if (state->cfg->phase_noise_mode == 0)  in dib3000mc_init()
366 		dib3000mc_write_word(state, 111, 0x00);  in dib3000mc_init()
368 		dib3000mc_write_word(state, 111, 0x02);  in dib3000mc_init()
371 	dib3000mc_write_word(state, 50, 0x8000);  in dib3000mc_init()
374 	dib3000mc_setup_pwm_state(state);  in dib3000mc_init()
377 	dib3000mc_write_word(state, 53, 0x87);  in dib3000mc_init()
379 	dib3000mc_write_word(state, 54, 0x87);  in dib3000mc_init()
382 	dib3000mc_write_word(state, 36, state->cfg->max_time);  in dib3000mc_init()
383 …dib3000mc_write_word(state, 37, (state->cfg->agc_command1 << 13) | (state->cfg->agc_command2 << 12…  in dib3000mc_init()
384 	dib3000mc_write_word(state, 38, state->cfg->pwm3_value);  in dib3000mc_init()
385 	dib3000mc_write_word(state, 39, state->cfg->ln_adc_level);  in dib3000mc_init()
388 	dib3000mc_write_word(state, 40, 0x0179);  in dib3000mc_init()
389 	dib3000mc_write_word(state, 41, 0x03f0);  in dib3000mc_init()
391 	dib3000mc_write_word(state, 42, agc->agc1_max);  in dib3000mc_init()
392 	dib3000mc_write_word(state, 43, agc->agc1_min);  in dib3000mc_init()
393 	dib3000mc_write_word(state, 44, agc->agc2_max);  in dib3000mc_init()
394 	dib3000mc_write_word(state, 45, agc->agc2_min);  in dib3000mc_init()
395 	dib3000mc_write_word(state, 46, (agc->agc1_pt1 << 8) | agc->agc1_pt2);  in dib3000mc_init()
396 	dib3000mc_write_word(state, 47, (agc->agc1_slope1 << 8) | agc->agc1_slope2);  in dib3000mc_init()
397 	dib3000mc_write_word(state, 48, (agc->agc2_pt1 << 8) | agc->agc2_pt2);  in dib3000mc_init()
398 	dib3000mc_write_word(state, 49, (agc->agc2_slope1 << 8) | agc->agc2_slope2);  in dib3000mc_init()
402 	dib3000mc_write_word(state, 110, 3277);  in dib3000mc_init()
404 	dib3000mc_write_word(state,  26, 0x6680);  in dib3000mc_init()
406 	dib3000mc_write_word(state, 1, 4);  in dib3000mc_init()
408 	dib3000mc_write_word(state, 2, 4);  in dib3000mc_init()
410 	dib3000mc_write_word(state, 3, 0x1000);  in dib3000mc_init()
412 	dib3000mc_write_word(state, 5, 1);  in dib3000mc_init()
414 	dib3000mc_set_bandwidth(state, 8000);  in dib3000mc_init()
417 	dib3000mc_write_word(state,  4, 0x814);  in dib3000mc_init()
419 	dib3000mc_write_word(state, 21, (1 << 9) | 0x164);  in dib3000mc_init()
420 	dib3000mc_write_word(state, 22, 0x463d);  in dib3000mc_init()
424 	dib3000mc_write_word(state, 120, 0x200f);  in dib3000mc_init()
426 	dib3000mc_write_word(state, 134, 0);  in dib3000mc_init()
429 	dib3000mc_write_word(state, 195, 0x10);  in dib3000mc_init()
432 	dib3000mc_write_word(state, 180, 0x2FF0);  in dib3000mc_init()
435 	dib3000mc_set_impulse_noise(state, 0, TRANSMISSION_MODE_8K);  in dib3000mc_init()
438 	dib3000mc_set_output_mode(state, OUTMODE_HIGH_Z);  in dib3000mc_init()
441 	dib3000mc_write_word(state, 769, (1 << 7) );  in dib3000mc_init()
448 	struct dib3000mc_state *state = demod->demodulator_priv;  in dib3000mc_sleep()  local
450 	dib3000mc_write_word(state, 1031, 0xFFFF);  in dib3000mc_sleep()
451 	dib3000mc_write_word(state, 1032, 0xFFFF);  in dib3000mc_sleep()
452 	dib3000mc_write_word(state, 1033, 0xFFF0);  in dib3000mc_sleep()
457 static void dib3000mc_set_adp_cfg(struct dib3000mc_state *state, s16 qam)  in dib3000mc_set_adp_cfg()  argument
472 		dib3000mc_write_word(state, reg, cfg[reg - 129]);  in dib3000mc_set_adp_cfg()
475 static void dib3000mc_set_channel_cfg(struct dib3000mc_state *state,  in dib3000mc_set_channel_cfg()  argument
481 	dib3000mc_set_bandwidth(state, bw);  in dib3000mc_set_channel_cfg()
482 	dib3000mc_set_timing(state, ch->transmission_mode, bw, 0);  in dib3000mc_set_channel_cfg()
485 	dib3000mc_write_word(state, 100, (16 << 6) + 9);  in dib3000mc_set_channel_cfg()
488 		dib3000mc_write_word(state, 100, (11 << 6) + 6);  in dib3000mc_set_channel_cfg()
490 		dib3000mc_write_word(state, 100, (16 << 6) + 9);  in dib3000mc_set_channel_cfg()
493 	dib3000mc_write_word(state, 1027, 0x0800);  in dib3000mc_set_channel_cfg()
494 	dib3000mc_write_word(state, 1027, 0x0000);  in dib3000mc_set_channel_cfg()
497 	dib3000mc_write_word(state, 26,  0x6680);  in dib3000mc_set_channel_cfg()
498 	dib3000mc_write_word(state, 29,  0x1273);  in dib3000mc_set_channel_cfg()
499 	dib3000mc_write_word(state, 33,       5);  in dib3000mc_set_channel_cfg()
500 	dib3000mc_set_adp_cfg(state, QAM_16);  in dib3000mc_set_channel_cfg()
501 	dib3000mc_write_word(state, 133,  15564);  in dib3000mc_set_channel_cfg()
503 	dib3000mc_write_word(state, 12 , 0x0);  in dib3000mc_set_channel_cfg()
504 	dib3000mc_write_word(state, 13 , 0x3e8);  in dib3000mc_set_channel_cfg()
505 	dib3000mc_write_word(state, 14 , 0x0);  in dib3000mc_set_channel_cfg()
506 	dib3000mc_write_word(state, 15 , 0x3f2);  in dib3000mc_set_channel_cfg()
508 	dib3000mc_write_word(state, 93,0);  in dib3000mc_set_channel_cfg()
509 	dib3000mc_write_word(state, 94,0);  in dib3000mc_set_channel_cfg()
510 	dib3000mc_write_word(state, 95,0);  in dib3000mc_set_channel_cfg()
511 	dib3000mc_write_word(state, 96,0);  in dib3000mc_set_channel_cfg()
512 	dib3000mc_write_word(state, 97,0);  in dib3000mc_set_channel_cfg()
513 	dib3000mc_write_word(state, 98,0);  in dib3000mc_set_channel_cfg()
515 	dib3000mc_set_impulse_noise(state, 0, ch->transmission_mode);  in dib3000mc_set_channel_cfg()
542 	dib3000mc_write_word(state, 0, value);  in dib3000mc_set_channel_cfg()
543 	dib3000mc_write_word(state, 5, (1 << 8) | ((seq & 0xf) << 4));  in dib3000mc_set_channel_cfg()
558 	dib3000mc_write_word(state, 181, value);  in dib3000mc_set_channel_cfg()
574 	value |= dib3000mc_read_word(state, 180) & 0x000f;  in dib3000mc_set_channel_cfg()
575 	dib3000mc_write_word(state, 180, value);  in dib3000mc_set_channel_cfg()
578 	value = dib3000mc_read_word(state, 0);  in dib3000mc_set_channel_cfg()
579 	dib3000mc_write_word(state, 0, value | (1 << 9));  in dib3000mc_set_channel_cfg()
580 	dib3000mc_write_word(state, 0, value);  in dib3000mc_set_channel_cfg()
584 	dib3000mc_set_impulse_noise(state, state->cfg->impulse_noise_mode, ch->transmission_mode);  in dib3000mc_set_channel_cfg()
590 	struct dib3000mc_state *state = demod->demodulator_priv;  in dib3000mc_autosearch_start()  local
607 	dib3000mc_set_channel_cfg(state, &schan, 11);  in dib3000mc_autosearch_start()
609 	reg = dib3000mc_read_word(state, 0);  in dib3000mc_autosearch_start()
610 	dib3000mc_write_word(state, 0, reg | (1 << 8));  in dib3000mc_autosearch_start()
611 	dib3000mc_read_word(state, 511);  in dib3000mc_autosearch_start()
612 	dib3000mc_write_word(state, 0, reg);  in dib3000mc_autosearch_start()
619 	struct dib3000mc_state *state = demod->demodulator_priv;  in dib3000mc_autosearch_is_irq()  local
620 	u16 irq_pending = dib3000mc_read_word(state, 511);  in dib3000mc_autosearch_is_irq()
634 	struct dib3000mc_state *state = demod->demodulator_priv;  in dib3000mc_tune()  local
637 	dib3000mc_set_channel_cfg(state, ch, 0);  in dib3000mc_tune()
640 	if (state->sfn_workaround_active) {  in dib3000mc_tune()
642 		dib3000mc_write_word(state, 29, 0x1273);  in dib3000mc_tune()
643 		dib3000mc_write_word(state, 108, 0x4000); // P_pha3_force_pha_shift  in dib3000mc_tune()
645 		dib3000mc_write_word(state, 29, 0x1073);  in dib3000mc_tune()
646 		dib3000mc_write_word(state, 108, 0x0000); // P_pha3_force_pha_shift  in dib3000mc_tune()
649 	dib3000mc_set_adp_cfg(state, (u8)ch->modulation);  in dib3000mc_tune()
651 		dib3000mc_write_word(state, 26, 38528);  in dib3000mc_tune()
652 		dib3000mc_write_word(state, 33, 8);  in dib3000mc_tune()
654 		dib3000mc_write_word(state, 26, 30336);  in dib3000mc_tune()
655 		dib3000mc_write_word(state, 33, 6);  in dib3000mc_tune()
658 	if (dib3000mc_read_word(state, 509) & 0x80)  in dib3000mc_tune()
659 		dib3000mc_set_timing(state, ch->transmission_mode,  in dib3000mc_tune()
676 	struct dib3000mc_state *state = fe->demodulator_priv;  in dib3000mc_get_frontend()  local
677 	u16 tps = dib3000mc_read_word(state,458);  in dib3000mc_get_frontend()
681 	fep->bandwidth_hz = state->current_bandwidth;  in dib3000mc_get_frontend()
731 	struct dib3000mc_state *state = fe->demodulator_priv;  in dib3000mc_set_frontend()  local
734 	dib3000mc_set_output_mode(state, OUTMODE_HIGH_Z);  in dib3000mc_set_frontend()
736 	state->current_bandwidth = fep->bandwidth_hz;  in dib3000mc_set_frontend()
737 	dib3000mc_set_bandwidth(state, BANDWIDTH_TO_KHZ(fep->bandwidth_hz));  in dib3000mc_set_frontend()
740 	state->sfn_workaround_active = buggy_sfn_workaround;  in dib3000mc_set_frontend()
769 	dib3000mc_set_output_mode(state, OUTMODE_MPEG2_FIFO);  in dib3000mc_set_frontend()
775 	struct dib3000mc_state *state = fe->demodulator_priv;  in dib3000mc_read_status()  local
776 	u16 lock = dib3000mc_read_word(state, 509);  in dib3000mc_read_status()
796 	struct dib3000mc_state *state = fe->demodulator_priv;  in dib3000mc_read_ber()  local
797 	*ber = (dib3000mc_read_word(state, 500) << 16) | dib3000mc_read_word(state, 501);  in dib3000mc_read_ber()
803 	struct dib3000mc_state *state = fe->demodulator_priv;  in dib3000mc_read_unc_blocks()  local
804 	*unc = dib3000mc_read_word(state, 508);  in dib3000mc_read_unc_blocks()
810 	struct dib3000mc_state *state = fe->demodulator_priv;  in dib3000mc_read_signal_strength()  local
811 	u16 val = dib3000mc_read_word(state, 392);  in dib3000mc_read_signal_strength()
830 	struct dib3000mc_state *state = fe->demodulator_priv;  in dib3000mc_release()  local
831 	dibx000_exit_i2c_master(&state->i2c_master);  in dib3000mc_release()
832 	kfree(state);  in dib3000mc_release()
837 	struct dib3000mc_state *state = fe->demodulator_priv;  in dib3000mc_pid_control()  local
838 	dib3000mc_write_word(state, 212 + index,  onoff ? (1 << 13) | pid : 0);  in dib3000mc_pid_control()
845 	struct dib3000mc_state *state = fe->demodulator_priv;  in dib3000mc_pid_parse()  local
846 	u16 tmp = dib3000mc_read_word(state, 206) & ~(1 << 4);  in dib3000mc_pid_parse()
848 	return dib3000mc_write_word(state, 206, tmp);  in dib3000mc_pid_parse()
854 	struct dib3000mc_state *state = fe->demodulator_priv;  in dib3000mc_set_config()  local
855 	state->cfg = cfg;  in dib3000mc_set_config()