387 	img_ir_write(priv, IMG_IR_LEAD_SYMB_TIMING, regs->ldr);  in img_ir_write_timings()
388 	img_ir_write(priv, IMG_IR_S00_SYMB_TIMING, regs->s00);  in img_ir_write_timings()
389 	img_ir_write(priv, IMG_IR_S01_SYMB_TIMING, regs->s01);  in img_ir_write_timings()
390 	img_ir_write(priv, IMG_IR_S10_SYMB_TIMING, regs->s10);  in img_ir_write_timings()
391 	img_ir_write(priv, IMG_IR_S11_SYMB_TIMING, regs->s11);  in img_ir_write_timings()
392 	img_ir_write(priv, IMG_IR_FREE_SYMB_TIMING, ft);  in img_ir_write_timings()
404 		img_ir_write(priv, IMG_IR_IRQ_MSG_DATA_LW, (u32)filter->data);  in img_ir_write_filter()
405 		img_ir_write(priv, IMG_IR_IRQ_MSG_DATA_UP, (u32)(filter->data  in img_ir_write_filter()
407 		img_ir_write(priv, IMG_IR_IRQ_MSG_MASK_LW, (u32)filter->mask);  in img_ir_write_filter()
408 		img_ir_write(priv, IMG_IR_IRQ_MSG_MASK_UP, (u32)(filter->mask  in img_ir_write_filter()
412 		img_ir_write(priv, IMG_IR_IRQ_MSG_MASK_LW, 0);  in img_ir_write_filter()
413 		img_ir_write(priv, IMG_IR_IRQ_MSG_MASK_UP, 0);  in img_ir_write_filter()
441 	img_ir_write(priv, IMG_IR_IRQ_CLEAR, irq_on);  in _img_ir_set_filter()
442 	img_ir_write(priv, IMG_IR_IRQ_ENABLE, irq_en);  in _img_ir_set_filter()
570 	img_ir_write(priv, IMG_IR_CONTROL, 0);  in img_ir_set_decoder()
572 	img_ir_write(priv, IMG_IR_IRQ_ENABLE, irq_en & IMG_IR_IRQ_EDGE);  in img_ir_set_decoder()
573 	img_ir_write(priv, IMG_IR_IRQ_CLEAR, IMG_IR_IRQ_ALL & ~IMG_IR_IRQ_EDGE);  in img_ir_set_decoder()
579 		img_ir_write(priv, IMG_IR_STATUS, ir_status);  in img_ir_set_decoder()
616 	img_ir_write(priv, IMG_IR_CONTROL, hw->reg_timings.ctrl);  in img_ir_set_decoder()
741 		img_ir_write(priv, IMG_IR_IRQ_ENABLE, IMG_IR_IRQ_DATA_MATCH);  in img_ir_enable_wake()
768 			img_ir_write(priv, IMG_IR_IRQ_ENABLE,  in img_ir_disable_wake()
774 			img_ir_write(priv, IMG_IR_IRQ_ENABLE,  in img_ir_disable_wake()
796 		img_ir_write(priv, IMG_IR_CONTROL, 0);  in img_ir_begin_repeat()
800 		img_ir_write(priv, IMG_IR_CONTROL, hw->reg_timings.ctrl);  in img_ir_begin_repeat()
810 		img_ir_write(priv, IMG_IR_CONTROL, 0);  in img_ir_end_repeat()
814 		img_ir_write(priv, IMG_IR_CONTROL, hw->reg_timings.ctrl);  in img_ir_end_repeat()
895 		img_ir_write(priv, IMG_IR_IRQ_ENABLE,  in img_ir_suspend_timer()
898 	img_ir_write(priv, IMG_IR_CONTROL, priv->hw.reg_timings.ctrl);  in img_ir_suspend_timer()
984 		img_ir_write(priv, IMG_IR_CONTROL, 0);  in img_ir_isr_hw()
986 		img_ir_write(priv, IMG_IR_IRQ_ENABLE,  in img_ir_isr_hw()
995 	img_ir_write(priv, IMG_IR_STATUS, ir_status);  in img_ir_isr_hw()