Lines Matching refs:set_reg_bits

172 static void set_reg_bits(struct reg_pair_t *reg_pair, u8 reg, u8 mask, u8 val)  in set_reg_bits()  function
216 set_reg_bits(state->tab_init, 0x06, 0x1f, 0x12); in mxl5007t_set_mode_bits()
219 set_reg_bits(state->tab_init, 0x06, 0x1f, 0x11); in mxl5007t_set_mode_bits()
222 set_reg_bits(state->tab_init, 0x06, 0x1f, 0x10); in mxl5007t_set_mode_bits()
225 set_reg_bits(state->tab_init_cable, 0x09, 0xff, 0xc1); in mxl5007t_set_mode_bits()
226 set_reg_bits(state->tab_init_cable, 0x0a, 0xff, in mxl5007t_set_mode_bits()
228 set_reg_bits(state->tab_init_cable, 0x0b, 0xff, 0x17); in mxl5007t_set_mode_bits()
280 set_reg_bits(state->tab_init, 0x02, 0x0f, val); in mxl5007t_set_if_freq_bits()
283 set_reg_bits(state->tab_init, 0x02, 0x10, invert_if ? 0x10 : 0x00); in mxl5007t_set_if_freq_bits()
296 set_reg_bits(state->tab_init, 0x03, 0xf0, 0x00); in mxl5007t_set_xtal_freq_bits()
297 set_reg_bits(state->tab_init, 0x05, 0x0f, 0x00); in mxl5007t_set_xtal_freq_bits()
300 set_reg_bits(state->tab_init, 0x03, 0xf0, 0x10); in mxl5007t_set_xtal_freq_bits()
301 set_reg_bits(state->tab_init, 0x05, 0x0f, 0x01); in mxl5007t_set_xtal_freq_bits()
304 set_reg_bits(state->tab_init, 0x03, 0xf0, 0x20); in mxl5007t_set_xtal_freq_bits()
305 set_reg_bits(state->tab_init, 0x05, 0x0f, 0x02); in mxl5007t_set_xtal_freq_bits()
308 set_reg_bits(state->tab_init, 0x03, 0xf0, 0x30); in mxl5007t_set_xtal_freq_bits()
309 set_reg_bits(state->tab_init, 0x05, 0x0f, 0x03); in mxl5007t_set_xtal_freq_bits()
312 set_reg_bits(state->tab_init, 0x03, 0xf0, 0x40); in mxl5007t_set_xtal_freq_bits()
313 set_reg_bits(state->tab_init, 0x05, 0x0f, 0x04); in mxl5007t_set_xtal_freq_bits()
316 set_reg_bits(state->tab_init, 0x03, 0xf0, 0x50); in mxl5007t_set_xtal_freq_bits()
317 set_reg_bits(state->tab_init, 0x05, 0x0f, 0x05); in mxl5007t_set_xtal_freq_bits()
320 set_reg_bits(state->tab_init, 0x03, 0xf0, 0x60); in mxl5007t_set_xtal_freq_bits()
321 set_reg_bits(state->tab_init, 0x05, 0x0f, 0x06); in mxl5007t_set_xtal_freq_bits()
324 set_reg_bits(state->tab_init, 0x03, 0xf0, 0x70); in mxl5007t_set_xtal_freq_bits()
325 set_reg_bits(state->tab_init, 0x05, 0x0f, 0x07); in mxl5007t_set_xtal_freq_bits()
328 set_reg_bits(state->tab_init, 0x03, 0xf0, 0x80); in mxl5007t_set_xtal_freq_bits()
329 set_reg_bits(state->tab_init, 0x05, 0x0f, 0x08); in mxl5007t_set_xtal_freq_bits()
332 set_reg_bits(state->tab_init, 0x03, 0xf0, 0x90); in mxl5007t_set_xtal_freq_bits()
333 set_reg_bits(state->tab_init, 0x05, 0x0f, 0x09); in mxl5007t_set_xtal_freq_bits()
336 set_reg_bits(state->tab_init, 0x03, 0xf0, 0xa0); in mxl5007t_set_xtal_freq_bits()
337 set_reg_bits(state->tab_init, 0x05, 0x0f, 0x0a); in mxl5007t_set_xtal_freq_bits()
340 set_reg_bits(state->tab_init, 0x03, 0xf0, 0xb0); in mxl5007t_set_xtal_freq_bits()
341 set_reg_bits(state->tab_init, 0x05, 0x0f, 0x0b); in mxl5007t_set_xtal_freq_bits()
344 set_reg_bits(state->tab_init, 0x03, 0xf0, 0xc0); in mxl5007t_set_xtal_freq_bits()
345 set_reg_bits(state->tab_init, 0x05, 0x0f, 0x0c); in mxl5007t_set_xtal_freq_bits()
348 set_reg_bits(state->tab_init, 0x03, 0xf0, 0xd0); in mxl5007t_set_xtal_freq_bits()
349 set_reg_bits(state->tab_init, 0x05, 0x0f, 0x0d); in mxl5007t_set_xtal_freq_bits()
371 set_reg_bits(state->tab_init, 0x03, 0x08, cfg->clk_out_enable << 3); in mxl5007t_calc_init_regs()
372 set_reg_bits(state->tab_init, 0x03, 0x07, cfg->clk_out_amp); in mxl5007t_calc_init_regs()
409 set_reg_bits(state->tab_rftune, 0x0c, 0x3f, val); in mxl5007t_set_bw_bits()
446 set_reg_bits(state->tab_rftune, 0x0d, 0xff, (u8) dig_rf_freq); in mxl5007t_calc_rf_tune_regs()
447 set_reg_bits(state->tab_rftune, 0x0e, 0xff, (u8) (dig_rf_freq >> 8)); in mxl5007t_calc_rf_tune_regs()
450 set_reg_bits(state->tab_rftune, 0x80, 0x40, 0x40); in mxl5007t_calc_rf_tune_regs()