Lines Matching refs:mxl111sf_read_reg

39 		ret = mxl111sf_read_reg(state, 0x19, &tmp);  in mxl111sf_set_gpo_state()
50 		ret = mxl111sf_read_reg(state, 0x30, &tmp);  in mxl111sf_set_gpo_state()
78 		ret = mxl111sf_read_reg(state, 0x23, &tmp);  in mxl111sf_get_gpi_state()
87 		ret = mxl111sf_read_reg(state, 0x2f, &tmp);  in mxl111sf_get_gpi_state()
95 		ret = mxl111sf_read_reg(state, 0x22, &tmp);  in mxl111sf_get_gpi_state()
126 		ret = mxl111sf_read_reg(state, MXL_GPIO_MUX_REG_0, &tmp);  in mxl111sf_config_gpio_pins()
139 		ret = mxl111sf_read_reg(state, MXL_GPIO_MUX_REG_1, &tmp);  in mxl111sf_config_gpio_pins()
151 		ret = mxl111sf_read_reg(state, MXL_GPIO_MUX_REG_2, &tmp);  in mxl111sf_config_gpio_pins()
218 	ret = mxl111sf_read_reg(state, 0x17, &r17);  in mxl111sf_config_pin_mux_modes()
221 	ret = mxl111sf_read_reg(state, 0x18, &r18);  in mxl111sf_config_pin_mux_modes()
224 	ret = mxl111sf_read_reg(state, 0x12, &r12);  in mxl111sf_config_pin_mux_modes()
227 	ret = mxl111sf_read_reg(state, 0x15, &r15);  in mxl111sf_config_pin_mux_modes()
230 	ret = mxl111sf_read_reg(state, 0x82, &r82);  in mxl111sf_config_pin_mux_modes()
233 	ret = mxl111sf_read_reg(state, 0x84, &r84);  in mxl111sf_config_pin_mux_modes()
236 	ret = mxl111sf_read_reg(state, 0x89, &r89);  in mxl111sf_config_pin_mux_modes()
239 	ret = mxl111sf_read_reg(state, 0x3D, &r3D);  in mxl111sf_config_pin_mux_modes()