40 		if (mxl_fail(ret))  in mxl111sf_set_gpo_state()
45 		if (mxl_fail(ret))  in mxl111sf_set_gpo_state()
51 		if (mxl_fail(ret))  in mxl111sf_set_gpo_state()
56 		if (mxl_fail(ret))  in mxl111sf_set_gpo_state()
79 		if (mxl_fail(ret))  in mxl111sf_get_gpi_state()
88 		if (mxl_fail(ret))  in mxl111sf_get_gpi_state()
96 		if (mxl_fail(ret))  in mxl111sf_get_gpi_state()
127 		if (mxl_fail(ret))  in mxl111sf_config_gpio_pins()
132 		if (mxl_fail(ret))  in mxl111sf_config_gpio_pins()
140 		if (mxl_fail(ret))  in mxl111sf_config_gpio_pins()
145 		if (mxl_fail(ret))  in mxl111sf_config_gpio_pins()
152 		if (mxl_fail(ret))  in mxl111sf_config_gpio_pins()
157 		if (mxl_fail(ret))  in mxl111sf_config_gpio_pins()
169 	mxl_fail(ret);  in mxl111sf_config_gpio_pins()
219 	if (mxl_fail(ret))  in mxl111sf_config_pin_mux_modes()
222 	if (mxl_fail(ret))  in mxl111sf_config_pin_mux_modes()
225 	if (mxl_fail(ret))  in mxl111sf_config_pin_mux_modes()
228 	if (mxl_fail(ret))  in mxl111sf_config_pin_mux_modes()
231 	if (mxl_fail(ret))  in mxl111sf_config_pin_mux_modes()
234 	if (mxl_fail(ret))  in mxl111sf_config_pin_mux_modes()
237 	if (mxl_fail(ret))  in mxl111sf_config_pin_mux_modes()
240 	if (mxl_fail(ret))  in mxl111sf_config_pin_mux_modes()
528 	if (mxl_fail(ret))  in mxl111sf_config_pin_mux_modes()
531 	if (mxl_fail(ret))  in mxl111sf_config_pin_mux_modes()
534 	if (mxl_fail(ret))  in mxl111sf_config_pin_mux_modes()
537 	if (mxl_fail(ret))  in mxl111sf_config_pin_mux_modes()
540 	if (mxl_fail(ret))  in mxl111sf_config_pin_mux_modes()
543 	if (mxl_fail(ret))  in mxl111sf_config_pin_mux_modes()
546 	if (mxl_fail(ret))  in mxl111sf_config_pin_mux_modes()
549 	if (mxl_fail(ret))  in mxl111sf_config_pin_mux_modes()
571 		if (mxl_fail(ret))  in mxl111sf_hw_gpio_initialize()