Lines Matching refs:u8
92 u8 ver_num;
93 u8 scal_count;
94 u8 riodev_count;
103 u8 node_id;
105 u8 port0_node_connect;
106 u8 port0_port_connect;
107 u8 port1_node_connect;
108 u8 port1_port_connect;
109 u8 port2_node_connect;
110 u8 port2_port_connect;
111 u8 chassis_num;
120 u8 rio_node_id;
122 u8 rio_type;
123 u8 owner_id;
124 u8 port0_node_connect;
125 u8 port0_port_connect;
126 u8 port1_node_connect;
127 u8 port1_port_connect;
128 u8 first_slot_num;
129 u8 status;
130 u8 wpindex;
131 u8 chassis_num;
136 u8 rio_type;
137 u8 chassis_num;
138 u8 first_slot_num;
139 u8 middle_num;
144 u8 rio_type;
145 u8 chassis_num;
146 u8 first_slot_num;
147 u8 middle_num;
148 u8 pack_count;
157 u8 format;
168 u8 slot_num;
170 u8 ctl_index;
171 u8 slot_cap;
176 u8 slots_at_33_conv;
177 u8 slots_at_66_conv;
178 u8 slots_at_66_pcix;
179 u8 slots_at_100_pcix;
180 u8 slots_at_133_pcix;
194 u8 bus;
195 u8 dev_fun;
200 u8 i2c_addr;
211 u8 format;
223 u8 rsrc_type;
224 u8 bus_num;
225 u8 dev_fun;
228 u8 marked; /* for NVRAM */
238 u8 slot_min;
239 u8 slot_max;
240 u8 slot_count;
241 u8 busno;
242 u8 controller_id;
243 u8 current_speed;
244 u8 current_bus_mode;
245 u8 index;
246 u8 slots_at_33_conv;
247 u8 slots_at_66_conv;
248 u8 slots_at_66_pcix;
249 u8 slots_at_100_pcix;
250 u8 slots_at_133_pcix;
266 struct slot *ibmphp_get_slot_from_physical_num(u8);
272 int ibmphp_get_bus_index(u8);
329 u8 busno;
348 u8 busno;
349 u8 devfunc;
354 u8 fromMem; /* this is to indicate that the range is from
364 u8 not_correct; /* needed for return */
374 int ibmphp_check_resource(struct resource_node *, u8);
375 int ibmphp_remove_bus(struct bus_node *, u8);
378 struct bus_node *ibmphp_find_res_bus(u8);
382 int ibmphp_hpc_readslot(struct slot *, u8, u8 *);
383 int ibmphp_hpc_writeslot(struct slot *, u8);
586 #define SLOT_POWER(s) ((u8) ((s & HPC_SLOT_POWER) \
589 #define SLOT_CONNECT(s) ((u8) ((s & HPC_SLOT_CONNECT) \
592 #define SLOT_ATTN(s, es) ((u8) ((es & HPC_SLOT_BLINK_ATTN) \
596 #define SLOT_PRESENT(s) ((u8) ((s & HPC_SLOT_PRSNT1) \
600 #define SLOT_PWRGD(s) ((u8) ((s & HPC_SLOT_PWRGD) \
603 #define SLOT_BUS_SPEED(s) ((u8) ((s & HPC_SLOT_BUS_SPEED) \
606 #define SLOT_LATCH(s) ((u8) ((s & HPC_SLOT_LATCH) \
609 #define SLOT_PCIX(es) ((u8) ((es & HPC_SLOT_PCIX) \
612 #define SLOT_SPEED(es) ((u8) ((es & HPC_SLOT_SPEED2) \
617 #define SLOT_BUS_MODE(es) ((u8) ((es & HPC_SLOT_BUS_MODE) \
623 #define CURRENT_BUS_SPEED(s) ((u8) (s & BUS_SPEED_2) \
627 #define CURRENT_BUS_MODE(s) ((u8) (s & BUS_MODE) ? BUS_MODE_PCIX : BUS_MODE_PCI)
629 #define READ_BUS_STATUS(s) ((u8) (s->options & BUS_STATUS_AVAILABLE))
633 #define SET_BUS_STATUS(s) ((u8) (s->options & BUS_CONTROL_AVAILABLE))
635 #define READ_SLOT_LATCH(s) ((u8) (s->options & SLOT_LATCH_REGS_SUPPORTED))
640 #define CTLR_WORKING(c) ((u8) ((c & HPC_CTLR_WORKING) \
642 #define CTLR_FINISHED(c) ((u8) ((c & HPC_CTLR_FINISHED) \
644 #define CTLR_RESULT(c) ((u8) ((c & HPC_CTLR_RESULT1) \
679 u8 busno;
680 u8 device;
681 u8 function;
687 u8 irq[4]; /* for interrupt config */
688 u8 bus; /* flag for unconfiguring, to say if PPB */
692 u8 bus;
693 u8 device;
694 u8 number;
695 u8 real_physical_slot_num;
697 u8 supported_speed;
698 u8 supported_bus_mode;
699 u8 flag; /* this is for disable slot and polling */
700 u8 ctlr_index;
704 u8 irq[4];
708 u8 status;
709 u8 ext_status;
710 u8 busstatus;
717 u8 starting_slot_num; /* starting and ending slot #'s this ctrl controls*/
718 u8 ending_slot_num;
719 u8 revision;
720 u8 options; /* which options HPC supports */
721 u8 status;
722 u8 ctlr_id;
723 u8 slot_count;
724 u8 bus_count;
725 u8 ctlr_relative_id;
732 u8 ctlr_type;
741 int ibmphp_configure_card(struct pci_func *, u8);