64 	struct rtc_device *rtc;  member
77 static inline uint32_t jz4740_rtc_reg_read(struct jz4740_rtc *rtc, size_t reg)  in jz4740_rtc_reg_read()  argument
79 	return readl(rtc->base + reg);  in jz4740_rtc_reg_read()
82 static int jz4740_rtc_wait_write_ready(struct jz4740_rtc *rtc)  in jz4740_rtc_wait_write_ready()  argument
88 		ctrl = jz4740_rtc_reg_read(rtc, JZ_REG_RTC_CTRL);  in jz4740_rtc_wait_write_ready()
94 static inline int jz4780_rtc_enable_write(struct jz4740_rtc *rtc)  in jz4780_rtc_enable_write()  argument
99 	ret = jz4740_rtc_wait_write_ready(rtc);  in jz4780_rtc_enable_write()
103 	writel(JZ_RTC_WENR_MAGIC, rtc->base + JZ_REG_RTC_WENR);  in jz4780_rtc_enable_write()
106 		ctrl = readl(rtc->base + JZ_REG_RTC_WENR);  in jz4780_rtc_enable_write()
112 static inline int jz4740_rtc_reg_write(struct jz4740_rtc *rtc, size_t reg,  in jz4740_rtc_reg_write()  argument
117 	if (rtc->type >= ID_JZ4780)  in jz4740_rtc_reg_write()
118 		ret = jz4780_rtc_enable_write(rtc);  in jz4740_rtc_reg_write()
120 		ret = jz4740_rtc_wait_write_ready(rtc);  in jz4740_rtc_reg_write()
122 		writel(val, rtc->base + reg);  in jz4740_rtc_reg_write()
127 static int jz4740_rtc_ctrl_set_bits(struct jz4740_rtc *rtc, uint32_t mask,  in jz4740_rtc_ctrl_set_bits()  argument
134 	spin_lock_irqsave(&rtc->lock, flags);  in jz4740_rtc_ctrl_set_bits()
136 	ctrl = jz4740_rtc_reg_read(rtc, JZ_REG_RTC_CTRL);  in jz4740_rtc_ctrl_set_bits()
146 	ret = jz4740_rtc_reg_write(rtc, JZ_REG_RTC_CTRL, ctrl);  in jz4740_rtc_ctrl_set_bits()
148 	spin_unlock_irqrestore(&rtc->lock, flags);  in jz4740_rtc_ctrl_set_bits()
155 	struct jz4740_rtc *rtc = dev_get_drvdata(dev);  in jz4740_rtc_read_time()  local
163 	secs = jz4740_rtc_reg_read(rtc, JZ_REG_RTC_SEC);  in jz4740_rtc_read_time()
164 	secs2 = jz4740_rtc_reg_read(rtc, JZ_REG_RTC_SEC);  in jz4740_rtc_read_time()
168 		secs2 = jz4740_rtc_reg_read(rtc, JZ_REG_RTC_SEC);  in jz4740_rtc_read_time()
181 	struct jz4740_rtc *rtc = dev_get_drvdata(dev);  in jz4740_rtc_set_mmss()  local
183 	return jz4740_rtc_reg_write(rtc, JZ_REG_RTC_SEC, secs);  in jz4740_rtc_set_mmss()
188 	struct jz4740_rtc *rtc = dev_get_drvdata(dev);  in jz4740_rtc_read_alarm()  local
192 	secs = jz4740_rtc_reg_read(rtc, JZ_REG_RTC_SEC_ALARM);  in jz4740_rtc_read_alarm()
194 	ctrl = jz4740_rtc_reg_read(rtc, JZ_REG_RTC_CTRL);  in jz4740_rtc_read_alarm()
207 	struct jz4740_rtc *rtc = dev_get_drvdata(dev);  in jz4740_rtc_set_alarm()  local
212 	ret = jz4740_rtc_reg_write(rtc, JZ_REG_RTC_SEC_ALARM, secs);  in jz4740_rtc_set_alarm()
214 		ret = jz4740_rtc_ctrl_set_bits(rtc,  in jz4740_rtc_set_alarm()
222 	struct jz4740_rtc *rtc = dev_get_drvdata(dev);  in jz4740_rtc_alarm_irq_enable()  local
223 	return jz4740_rtc_ctrl_set_bits(rtc, JZ_RTC_CTRL_AF_IRQ, enable);  in jz4740_rtc_alarm_irq_enable()
236 	struct jz4740_rtc *rtc = data;  in jz4740_rtc_irq()  local
240 	ctrl = jz4740_rtc_reg_read(rtc, JZ_REG_RTC_CTRL);  in jz4740_rtc_irq()
248 	rtc_update_irq(rtc->rtc, 1, events);  in jz4740_rtc_irq()
250 	jz4740_rtc_ctrl_set_bits(rtc, JZ_RTC_CTRL_1HZ | JZ_RTC_CTRL_AF, false);  in jz4740_rtc_irq()
257 	struct jz4740_rtc *rtc = dev_get_drvdata(dev);  in jz4740_rtc_poweroff()  local
258 	jz4740_rtc_reg_write(rtc, JZ_REG_RTC_HIBERNATE, 1);  in jz4740_rtc_poweroff()
263 	struct jz4740_rtc *rtc = dev_get_drvdata(dev_for_power_off);  in jz4740_rtc_power_off()  local
268 	clk_prepare_enable(rtc->clk);  in jz4740_rtc_power_off()
270 	rtc_rate = clk_get_rate(rtc->clk);  in jz4740_rtc_power_off()
277 		(rtc->min_wakeup_pin_assert_time * rtc_rate) / 1000;  in jz4740_rtc_power_off()
282 	jz4740_rtc_reg_write(rtc,  in jz4740_rtc_power_off()
289 	reset_counter_ticks = (rtc->reset_pin_assert_time * rtc_rate) / 1000;  in jz4740_rtc_power_off()
294 	jz4740_rtc_reg_write(rtc,  in jz4740_rtc_power_off()
311 	struct jz4740_rtc *rtc;  in jz4740_rtc_probe()  local
319 	rtc = devm_kzalloc(&pdev->dev, sizeof(*rtc), GFP_KERNEL);  in jz4740_rtc_probe()
320 	if (!rtc)  in jz4740_rtc_probe()
324 		rtc->type = (enum jz4740_rtc_type)of_id->data;  in jz4740_rtc_probe()
326 		rtc->type = id->driver_data;  in jz4740_rtc_probe()
328 	rtc->irq = platform_get_irq(pdev, 0);  in jz4740_rtc_probe()
329 	if (rtc->irq < 0) {  in jz4740_rtc_probe()
335 	rtc->base = devm_ioremap_resource(&pdev->dev, mem);  in jz4740_rtc_probe()
336 	if (IS_ERR(rtc->base))  in jz4740_rtc_probe()
337 		return PTR_ERR(rtc->base);  in jz4740_rtc_probe()
339 	rtc->clk = devm_clk_get(&pdev->dev, "rtc");  in jz4740_rtc_probe()
340 	if (IS_ERR(rtc->clk)) {  in jz4740_rtc_probe()
342 		return PTR_ERR(rtc->clk);  in jz4740_rtc_probe()
345 	spin_lock_init(&rtc->lock);  in jz4740_rtc_probe()
347 	platform_set_drvdata(pdev, rtc);  in jz4740_rtc_probe()
351 	rtc->rtc = devm_rtc_device_register(&pdev->dev, pdev->name,  in jz4740_rtc_probe()
353 	if (IS_ERR(rtc->rtc)) {  in jz4740_rtc_probe()
354 		ret = PTR_ERR(rtc->rtc);  in jz4740_rtc_probe()
359 	ret = devm_request_irq(&pdev->dev, rtc->irq, jz4740_rtc_irq, 0,  in jz4740_rtc_probe()
360 				pdev->name, rtc);  in jz4740_rtc_probe()
366 	scratchpad = jz4740_rtc_reg_read(rtc, JZ_REG_RTC_SCRATCHPAD);  in jz4740_rtc_probe()
368 		ret = jz4740_rtc_reg_write(rtc, JZ_REG_RTC_SCRATCHPAD, 0x12345678);  in jz4740_rtc_probe()
369 		ret = jz4740_rtc_reg_write(rtc, JZ_REG_RTC_SEC, 0);  in jz4740_rtc_probe()
379 			rtc->reset_pin_assert_time = 60;  in jz4740_rtc_probe()
381 					     &rtc->reset_pin_assert_time);  in jz4740_rtc_probe()
384 			rtc->min_wakeup_pin_assert_time = 100;  in jz4740_rtc_probe()
387 					     &rtc->min_wakeup_pin_assert_time);  in jz4740_rtc_probe()
403 	struct jz4740_rtc *rtc = dev_get_drvdata(dev);  in jz4740_rtc_suspend()  local
406 		enable_irq_wake(rtc->irq);  in jz4740_rtc_suspend()
412 	struct jz4740_rtc *rtc = dev_get_drvdata(dev);  in jz4740_rtc_resume()  local
415 		disable_irq_wake(rtc->irq);  in jz4740_rtc_resume()