Lines Matching refs:irq

73 		struct vgic_irq *irq;  in vgic_v2_fold_lr_state()  local
85 irq = vgic_get_irq(vcpu->kvm, vcpu, intid); in vgic_v2_fold_lr_state()
87 spin_lock(&irq->irq_lock); in vgic_v2_fold_lr_state()
90 irq->active = !!(val & GICH_LR_ACTIVE_BIT); in vgic_v2_fold_lr_state()
92 if (irq->active && vgic_irq_is_sgi(intid)) in vgic_v2_fold_lr_state()
93 irq->active_source = cpuid; in vgic_v2_fold_lr_state()
96 if (irq->config == VGIC_CONFIG_EDGE && in vgic_v2_fold_lr_state()
98 irq->pending_latch = true; in vgic_v2_fold_lr_state()
101 irq->source |= (1 << cpuid); in vgic_v2_fold_lr_state()
107 if (irq->config == VGIC_CONFIG_LEVEL && !(val & GICH_LR_STATE)) in vgic_v2_fold_lr_state()
108 irq->pending_latch = false; in vgic_v2_fold_lr_state()
123 if (vgic_irq_is_mapped_level(irq) && (val & GICH_LR_PENDING_BIT)) { in vgic_v2_fold_lr_state()
124 irq->line_level = vgic_get_phys_line_level(irq); in vgic_v2_fold_lr_state()
126 if (!irq->line_level) in vgic_v2_fold_lr_state()
127 vgic_irq_set_phys_active(irq, false); in vgic_v2_fold_lr_state()
130 spin_unlock(&irq->irq_lock); in vgic_v2_fold_lr_state()
131 vgic_put_irq(vcpu->kvm, irq); in vgic_v2_fold_lr_state()
148 void vgic_v2_populate_lr(struct kvm_vcpu *vcpu, struct vgic_irq *irq, int lr) in vgic_v2_populate_lr() argument
150 u32 val = irq->intid; in vgic_v2_populate_lr()
153 if (irq->active) { in vgic_v2_populate_lr()
155 if (vgic_irq_is_sgi(irq->intid)) in vgic_v2_populate_lr()
156 val |= irq->active_source << GICH_LR_PHYSID_CPUID_SHIFT; in vgic_v2_populate_lr()
157 if (vgic_irq_is_multi_sgi(irq)) { in vgic_v2_populate_lr()
163 if (irq->group) in vgic_v2_populate_lr()
166 if (irq->hw) { in vgic_v2_populate_lr()
168 val |= irq->hwintid << GICH_LR_PHYSID_CPUID_SHIFT; in vgic_v2_populate_lr()
174 if (irq->active) in vgic_v2_populate_lr()
177 if (irq->config == VGIC_CONFIG_LEVEL) { in vgic_v2_populate_lr()
184 if (irq->active) in vgic_v2_populate_lr()
189 if (allow_pending && irq_is_pending(irq)) { in vgic_v2_populate_lr()
192 if (irq->config == VGIC_CONFIG_EDGE) in vgic_v2_populate_lr()
193 irq->pending_latch = false; in vgic_v2_populate_lr()
195 if (vgic_irq_is_sgi(irq->intid)) { in vgic_v2_populate_lr()
196 u32 src = ffs(irq->source); in vgic_v2_populate_lr()
199 irq->intid)) in vgic_v2_populate_lr()
203 irq->source &= ~(1 << (src - 1)); in vgic_v2_populate_lr()
204 if (irq->source) { in vgic_v2_populate_lr()
205 irq->pending_latch = true; in vgic_v2_populate_lr()
217 if (vgic_irq_is_mapped_level(irq) && (val & GICH_LR_PENDING_BIT)) in vgic_v2_populate_lr()
218 irq->line_level = false; in vgic_v2_populate_lr()
221 val |= (irq->priority >> 3) << GICH_LR_PRIORITY_SHIFT; in vgic_v2_populate_lr()