Lines Matching defs:tx_queue_extension
29 struct tx_queue_extension { struct
31 uint32_t frame_ctl : 16,
32 qos_ctl : 16;
33 uint32_t ampdu_flag : 1,
34 tx_notify_no_htc_override : 1,
35 reserved_1a : 7,
36 checksum_tso_disable_for_frag : 1,
37 key_id : 8,
38 qos_buf_state_overwrite : 1,
39 buf_state_sta_id : 1,
40 buf_state_source : 1,
41 ht_control_overwrite_enable : 1,
42 ht_control_overwrite_source : 4,
43 reserved_1b : 6;
44 uint32_t ul_headroom_insertion_enable : 1,
45 ul_headroom_offset : 5,
46 bqrp_insertion_enable : 1,
47 bqrp_offset : 5,
48 ul_headroom_rsvd_7_6 : 2,
49 bqr_rsvd_9_8 : 2,
50 base_pn_63_48 : 16;
51 uint32_t base_pn_95_64 : 32;
52 uint32_t base_pn_127_96 : 32;
53 uint32_t ht_control_field_bw20 : 32;
54 uint32_t ht_control_field_bw40 : 32;
55 uint32_t ht_control_field_bw80 : 32;
56 uint32_t ht_control_field_bw160 : 32;
57 uint32_t ht_control_overwrite_mask : 32;
58 uint32_t cas_control_info : 8,
59 cas_offset : 5,
60 cas_insertion_enable : 1,
61 reserved_10a : 2,
62 ht_control_overwrite_source_for_srp : 4,
63 ht_control_overwrite_source_for_bsrp : 4,
64 reserved_10b : 6,
65 mpdu_hdr_len_override_en : 1,
66 bar_ssn_overwrite_enable : 1;
67 uint32_t bar_ssn_offset : 12,
68 mpdu_hdr_len_override_val : 9,
69 reserved_11a : 11;
70 uint32_t ht_control_field_bw320 : 32;
71 uint32_t fw2sw_info : 32;