Lines Matching defs:rx_mpdu_info

63 struct rx_mpdu_info {  struct
64 uint32_t rxpcu_mpdu_filter_in_category : 2, //[1:0]
65 sw_frame_group_id : 7, //[8:2]
66 ndp_frame : 1, //[9]
67 phy_err : 1, //[10]
68 phy_err_during_mpdu_header : 1, //[11]
69 protocol_version_err : 1, //[12]
70 ast_based_lookup_valid : 1, //[13]
71 reserved_0a : 2, //[15:14]
72 phy_ppdu_id : 16; //[31:16]
73 uint32_t ast_index : 16, //[15:0]
74 sw_peer_id : 16; //[31:16]
75 uint32_t mpdu_frame_control_valid : 1, //[0]
76 mpdu_duration_valid : 1, //[1]
77 mac_addr_ad1_valid : 1, //[2]
78 mac_addr_ad2_valid : 1, //[3]
79 mac_addr_ad3_valid : 1, //[4]
80 mac_addr_ad4_valid : 1, //[5]
81 mpdu_sequence_control_valid : 1, //[6]
82 mpdu_qos_control_valid : 1, //[7]
83 mpdu_ht_control_valid : 1, //[8]
84 frame_encryption_info_valid : 1, //[9]
85 reserved_2a : 6, //[15:10]
86 fr_ds : 1, //[16]
87 to_ds : 1, //[17]
88 encrypted : 1, //[18]
89 mpdu_retry : 1, //[19]
90 mpdu_sequence_number : 12; //[31:20]
91 uint32_t epd_en : 1, //[0]
92 all_frames_shall_be_encrypted : 1, //[1]
93 encrypt_type : 4, //[5:2]
94 mesh_sta : 1, //[6]
95 bssid_hit : 1, //[7]
96 bssid_number : 4, //[11:8]
97 tid : 4, //[15:12]
98 reserved_3a : 16; //[31:16]
99 uint32_t pn_31_0 : 32; //[31:0]
100 uint32_t pn_63_32 : 32; //[31:0]
101 uint32_t pn_95_64 : 32; //[31:0]
102 uint32_t pn_127_96 : 32; //[31:0]
103 uint32_t peer_meta_data : 32; //[31:0]
104 struct rxpt_classify_info rxpt_classify_info_details;
105 uint32_t rx_reo_queue_desc_addr_31_0 : 32; //[31:0]
106 uint32_t rx_reo_queue_desc_addr_39_32 : 8, //[7:0]
107 receive_queue_number : 16, //[23:8]
108 pre_delim_err_warning : 1, //[24]
109 first_delim_err : 1, //[25]
110 reserved_11 : 6; //[31:26]
111 uint32_t key_id_octet : 8, //[7:0]
112 new_peer_entry : 1, //[8]
113 decrypt_needed : 1, //[9]
114 decap_type : 2, //[11:10]
115 rx_insert_vlan_c_tag_padding : 1, //[12]
116 rx_insert_vlan_s_tag_padding : 1, //[13]
117 strip_vlan_c_tag_decap : 1, //[14]
118 strip_vlan_s_tag_decap : 1, //[15]
119 pre_delim_count : 12, //[27:16]
120 ampdu_flag : 1, //[28]
121 bar_frame : 1, //[29]
122 reserved_12 : 2; //[31:30]
123 uint32_t mpdu_length : 14, //[13:0]
124 first_mpdu : 1, //[14]
125 mcast_bcast : 1, //[15]
126 ast_index_not_found : 1, //[16]
127 ast_index_timeout : 1, //[17]
128 power_mgmt : 1, //[18]
129 non_qos : 1, //[19]
130 null_data : 1, //[20]
131 mgmt_type : 1, //[21]
132 ctrl_type : 1, //[22]
133 more_data : 1, //[23]
134 eosp : 1, //[24]
135 fragment_flag : 1, //[25]
136 order : 1, //[26]
137 u_apsd_trigger : 1, //[27]
138 encrypt_required : 1, //[28]
139 directed : 1, //[29]
140 reserved_13 : 2; //[31:30]
141 uint32_t mpdu_frame_control_field : 16, //[15:0]
142 mpdu_duration_field : 16; //[31:16]
143 uint32_t mac_addr_ad1_31_0 : 32; //[31:0]
144 uint32_t mac_addr_ad1_47_32 : 16, //[15:0]
145 mac_addr_ad2_15_0 : 16; //[31:16]
146 uint32_t mac_addr_ad2_47_16 : 32; //[31:0]
147 uint32_t mac_addr_ad3_31_0 : 32; //[31:0]
148 uint32_t mac_addr_ad3_47_32 : 16, //[15:0]
149 mpdu_sequence_control_field : 16; //[31:16]
150 uint32_t mac_addr_ad4_31_0 : 32; //[31:0]
151 uint32_t mac_addr_ad4_47_32 : 16, //[15:0]
152 mpdu_qos_control_field : 16; //[31:16]
153 uint32_t mpdu_ht_control_field : 32; //[31:0]