Lines Matching defs:tx_queue_extension
36 struct tx_queue_extension { struct
38 uint32_t frame_ctl : 16,
39 qos_ctl : 16;
40 uint32_t ampdu_flag : 1,
41 tx_notify_no_htc_override : 1,
42 reserved_1a : 7,
43 checksum_tso_disable_for_frag : 1,
44 key_id : 8,
45 qos_buf_state_overwrite : 1,
46 buf_state_sta_id : 1,
47 buf_state_source : 1,
48 ht_control_overwrite_enable : 1,
49 ht_control_overwrite_source : 4,
50 reserved_1b : 6;
51 uint32_t ul_headroom_insertion_enable : 1,
52 ul_headroom_offset : 5,
53 bqrp_insertion_enable : 1,
54 bqrp_offset : 5,
55 ul_headroom_rsvd_7_6 : 2,
56 bqr_rsvd_9_8 : 2,
57 base_pn_63_48 : 16;
58 uint32_t base_pn_95_64 : 32;
59 uint32_t base_pn_127_96 : 32;
60 uint32_t ht_control_field_bw20 : 32;
61 uint32_t ht_control_field_bw40 : 32;
62 uint32_t ht_control_field_bw80 : 32;
63 uint32_t ht_control_field_bw160 : 32;
64 uint32_t ht_control_overwrite_mask : 32;
65 uint32_t cas_control_info : 8,
66 cas_offset : 5,
67 cas_insertion_enable : 1,
68 reserved_10a : 2,
69 ht_control_overwrite_source_for_srp : 4,
70 ht_control_overwrite_source_for_bsrp : 4,
71 reserved_10b : 6,
72 mpdu_hdr_len_override_en : 1,
73 bar_ssn_overwrite_enable : 1;
74 uint32_t bar_ssn_offset : 12,
75 mpdu_hdr_len_override_val : 9,
76 reserved_11a : 11;
77 uint32_t ht_control_field_bw320 : 32;
78 uint32_t fw2sw_info : 32;