1181 static int cnss_pci_reg_read(struct cnss_pci_data *pci_priv,  in cnss_pci_reg_read()  function
1364 		ret = cnss_pci_reg_read(pci_priv, offset, val);  in cnss_pci_debug_reg_read()
1380 	ret = cnss_pci_reg_read(pci_priv, offset, val);  in cnss_pci_debug_reg_read()
1555 		if (cnss_pci_reg_read(pci_priv, reg_offset, &val))  in cnss_pci_soc_scratch_reg_dump()
1581 	if (cnss_pci_reg_read(pci_priv, WLAON_SOC_RESET_CAUSE_SHADOW_REG,  in cnss_pci_soc_reset_cause_reg_dump()
1608 		if (cnss_pci_reg_read(pci_priv, reg_offset, &val))  in cnss_pci_bhi_debug_reg_dump()
1946 	cnss_pci_reg_read(pci_priv, TCSR_PBL_LOGGING_REG, &pbl_stage);  in cnss_pci_dump_bl_sram_mem()
1947 	cnss_pci_reg_read(pci_priv, PCIE_BHI_ERRDBG2_REG, &sbl_log_start);  in cnss_pci_dump_bl_sram_mem()
1948 	cnss_pci_reg_read(pci_priv, PCIE_BHI_ERRDBG3_REG, &sbl_log_size);  in cnss_pci_dump_bl_sram_mem()
1949 	cnss_pci_reg_read(pci_priv, PBL_WLAN_BOOT_CFG, &pbl_wlan_boot_cfg);  in cnss_pci_dump_bl_sram_mem()
1950 	cnss_pci_reg_read(pci_priv, pbl_bootstrap_status_reg,  in cnss_pci_dump_bl_sram_mem()
1966 		if (cnss_pci_reg_read(pci_priv, mem_addr, &val))  in cnss_pci_dump_bl_sram_mem()
1989 		if (cnss_pci_reg_read(pci_priv, mem_addr, &val))  in cnss_pci_dump_bl_sram_mem()
2025 		if (cnss_pci_reg_read(pci_priv, mem_addr, dump_ptr)) {  in cnss_pci_dump_sram()
2156 	ret = cnss_pci_reg_read(pci_priv, GCC_GCC_SPARE_REG_1, &read_val);  in cnss_rddm_trigger_debug()
2158 	ret = cnss_pci_reg_read(pci_priv, GCC_PRE_ARES_DEBUG_TIMER_VAL,  in cnss_rddm_trigger_debug()
2175 	ret = cnss_pci_reg_read(pci_priv, GCC_GCC_SPARE_REG_1, &read_val);  in cnss_rddm_trigger_check()
2179 	cnss_pci_reg_read(pci_priv, TCSR_PBL_LOGGING_REG, &pbl_stage);  in cnss_rddm_trigger_check()
2180 	cnss_pci_reg_read(pci_priv, PCIE_BHI_ERRDBG2_REG, &sbl_log_start);  in cnss_rddm_trigger_check()
2181 	cnss_pci_reg_read(pci_priv, PCIE_BHI_ERRDBG3_REG, &sbl_log_size);  in cnss_rddm_trigger_check()
2182 	cnss_pci_reg_read(pci_priv, PBL_WLAN_BOOT_CFG, &pbl_wlan_boot_cfg);  in cnss_rddm_trigger_check()
2522 		ret = cnss_pci_reg_read(pci_priv, scratch, &val);  in cnss_pci_store_qrtr_node_id()
2676 	ret = cnss_pci_reg_read(pci_priv, WLAON_QFPROM_PWR_CTRL_REG, &val);  in cnss_pci_set_wlaon_pwr_ctrl()
2731 		cnss_pci_reg_read(pci_priv, PCIE_MHI_TIME_LOW, &low);  in cnss_pci_get_device_timestamp()
2732 		cnss_pci_reg_read(pci_priv, PCIE_MHI_TIME_HIGH, &high);  in cnss_pci_get_device_timestamp()
2735 		cnss_pci_reg_read(pci_priv, WLAON_GLOBAL_COUNTER_CTRL3, &low);  in cnss_pci_get_device_timestamp()
2736 		cnss_pci_reg_read(pci_priv, WLAON_GLOBAL_COUNTER_CTRL4, &high);  in cnss_pci_get_device_timestamp()
2803 	cnss_pci_reg_read(pci_priv, time_reg_low, &low);  in cnss_pci_time_sync_reg_update()
2804 	cnss_pci_reg_read(pci_priv, time_reg_high, &high);  in cnss_pci_time_sync_reg_update()
3187 			if (cnss_pci_reg_read(pci_priv,  in cnss_pci_misc_reg_dump()
3245 		if (cnss_pci_reg_read(pci_priv, reg_offset,  in cnss_pci_dump_shadow_reg()
3253 		if (cnss_pci_reg_read(pci_priv, reg_offset,  in cnss_pci_dump_shadow_reg()
5893 		if (cnss_pci_reg_read(pci_priv, reg_offset,  in cnss_pci_dump_qdss_reg()
5928 			if (cnss_pci_reg_read(pci_priv, reg_offset, &val))  in cnss_pci_dump_ce_reg()
5936 			if (cnss_pci_reg_read(pci_priv, reg_offset, &val))  in cnss_pci_dump_ce_reg()
5945 			if (cnss_pci_reg_read(pci_priv, reg_offset, &val))  in cnss_pci_dump_ce_reg()