941 	mhi_debug_reg_dump(pci_priv->mhi_ctrl);  in cnss_mhi_debug_reg_dump()
946 	mhi_dump_sfr(pci_priv->mhi_ctrl);  in cnss_mhi_dump_sfr()
952 	return mhi_scan_rddm_cookie(pci_priv->mhi_ctrl, cookie);  in cnss_mhi_scan_rddm_cookie()
958 	return mhi_pm_fast_suspend(pci_priv->mhi_ctrl, notify_clients);  in cnss_mhi_pm_fast_suspend()
964 	return mhi_pm_fast_resume(pci_priv->mhi_ctrl, notify_clients);  in cnss_mhi_pm_fast_resume()
970 	return mhi_set_m2_timeout_ms(pci_priv->mhi_ctrl, timeout);  in cnss_mhi_set_m2_timeout_ms()
976 	return mhi_device_get_sync_atomic(pci_priv->mhi_ctrl->mhi_dev,  in cnss_mhi_device_get_sync_atomic()
983 	return mhi_host_notify_db_disable_trace(pci_priv->mhi_ctrl);  in cnss_mhi_host_notify_db_disable_trace()
989 				    int (*cb)(struct mhi_controller *mhi_ctrl,  in cnss_mhi_controller_set_bw_scale_cb()  argument
992 	mhi_controller_set_bw_scale_cb(pci_priv->mhi_ctrl, cb);  in cnss_mhi_controller_set_bw_scale_cb()
997 	return mhi_force_reset(pci_priv->mhi_ctrl);  in cnss_mhi_force_reset()
1003 	return mhi_controller_set_base(pci_priv->mhi_ctrl, base);  in cnss_mhi_controller_set_base()
1052 				    int (*cb)(struct mhi_controller *mhi_ctrl,  in cnss_mhi_controller_set_bw_scale_cb()  argument
1735 	if (pci_priv->mhi_ctrl) {  in cnss_pci_handle_linkdown()
1737 		mhi_report_error(pci_priv->mhi_ctrl);  in cnss_pci_handle_linkdown()
1957 	ee = mhi_get_exec_env(pci_priv->mhi_ctrl);  in cnss_pci_dump_bl_sram_mem()
1980 	ee = mhi_get_exec_env(pci_priv->mhi_ctrl);  in cnss_pci_dump_bl_sram_mem()
2233 	return mhi_pm_resume_force(pci_priv->mhi_ctrl);  in cnss_mhi_pm_force_resume()
2238 	return mhi_pm_resume(pci_priv->mhi_ctrl);  in cnss_mhi_pm_force_resume()
2264 		ret = mhi_prepare_for_power_up(pci_priv->mhi_ctrl);  in cnss_pci_set_mhi_state()
2267 		mhi_unprepare_after_power_down(pci_priv->mhi_ctrl);  in cnss_pci_set_mhi_state()
2271 		ret = mhi_sync_power_up(pci_priv->mhi_ctrl);  in cnss_pci_set_mhi_state()
2274 		if (!ret && !pci_priv->mhi_ctrl->img_pre_alloc) {  in cnss_pci_set_mhi_state()
2276 			pci_priv->mhi_ctrl->img_pre_alloc = true;  in cnss_pci_set_mhi_state()
2281 		mhi_power_down(pci_priv->mhi_ctrl, true);  in cnss_pci_set_mhi_state()
2285 		mhi_power_down(pci_priv->mhi_ctrl, false);  in cnss_pci_set_mhi_state()
2290 		mutex_lock(&pci_priv->mhi_ctrl->pm_mutex);  in cnss_pci_set_mhi_state()
2294 			ret = mhi_pm_suspend(pci_priv->mhi_ctrl);  in cnss_pci_set_mhi_state()
2295 		mutex_unlock(&pci_priv->mhi_ctrl->pm_mutex);  in cnss_pci_set_mhi_state()
2304 		mutex_lock(&pci_priv->mhi_ctrl->pm_mutex);  in cnss_pci_set_mhi_state()
2308 				mutex_unlock(&pci_priv->mhi_ctrl->pm_mutex);  in cnss_pci_set_mhi_state()
2317 				ret = mhi_pm_resume(pci_priv->mhi_ctrl);  in cnss_pci_set_mhi_state()
2319 		mutex_unlock(&pci_priv->mhi_ctrl->pm_mutex);  in cnss_pci_set_mhi_state()
2323 		ret = mhi_force_rddm_mode(pci_priv->mhi_ctrl);  in cnss_pci_set_mhi_state()
2566 		pci_priv->mhi_ctrl->timeout_ms = MHI_TIMEOUT_OVERWRITE_MS;  in cnss_pci_start_mhi()
2573 	timeout = pci_priv->mhi_ctrl->timeout_ms;  in cnss_pci_start_mhi()
2576 		pci_priv->mhi_ctrl->timeout_ms *= 6;  in cnss_pci_start_mhi()
2578 		pci_priv->mhi_ctrl->timeout_ms *= 3;  in cnss_pci_start_mhi()
2597 	pci_priv->mhi_ctrl->timeout_ms = timeout;  in cnss_pci_start_mhi()
4586 	struct mhi_controller *mhi_ctrl;  in cnss_pci_force_wake_request_sync()  local
4602 	mhi_ctrl = pci_priv->mhi_ctrl;  in cnss_pci_force_wake_request_sync()
4603 	if (!mhi_ctrl)  in cnss_pci_force_wake_request_sync()
4619 		return mhi_device_get_sync(mhi_ctrl->mhi_dev);  in cnss_pci_force_wake_request_sync()
4629 	struct mhi_controller *mhi_ctrl;  in cnss_pci_force_wake_request()  local
4645 	mhi_ctrl = pci_priv->mhi_ctrl;  in cnss_pci_force_wake_request()
4646 	if (!mhi_ctrl)  in cnss_pci_force_wake_request()
4656 	mhi_device_get(mhi_ctrl->mhi_dev);  in cnss_pci_force_wake_request()
4666 	struct mhi_controller *mhi_ctrl;  in cnss_pci_is_device_awake()  local
4682 	mhi_ctrl = pci_priv->mhi_ctrl;  in cnss_pci_is_device_awake()
4683 	if (!mhi_ctrl)  in cnss_pci_is_device_awake()
4686 	return (mhi_ctrl->dev_state == MHI_STATE_M0);  in cnss_pci_is_device_awake()
4695 	struct mhi_controller *mhi_ctrl;  in cnss_pci_force_wake_release()  local
4711 	mhi_ctrl = pci_priv->mhi_ctrl;  in cnss_pci_force_wake_release()
4712 	if (!mhi_ctrl)  in cnss_pci_force_wake_release()
4722 	mhi_device_put(mhi_ctrl->mhi_dev);  in cnss_pci_force_wake_release()
6051 	mhi_ee = mhi_get_exec_env(pci_priv->mhi_ctrl);  in cnss_pci_recover_link_down()
6388 		pci_priv->mhi_ctrl->timeout_ms /= 2;  in cnss_pci_collect_dump_info()
6396 	ret = mhi_download_rddm_image(pci_priv->mhi_ctrl, in_panic);  in cnss_pci_collect_dump_info()
6407 	fw_image = pci_priv->mhi_ctrl->fbc_image;  in cnss_pci_collect_dump_info()
6408 	rddm_image = pci_priv->mhi_ctrl->rddm_image;  in cnss_pci_collect_dump_info()
6495 	fw_image = pci_priv->mhi_ctrl->fbc_image;  in cnss_pci_clear_dump_info()
6496 	rddm_image = pci_priv->mhi_ctrl->rddm_image;  in cnss_pci_clear_dump_info()
6563 static int cnss_mhi_pm_runtime_get(struct mhi_controller *mhi_ctrl)  in cnss_mhi_pm_runtime_get()  argument
6565 	struct cnss_pci_data *pci_priv = dev_get_drvdata(mhi_ctrl->cntrl_dev);  in cnss_mhi_pm_runtime_get()
6570 static void cnss_mhi_pm_runtime_put_noidle(struct mhi_controller *mhi_ctrl)  in cnss_mhi_pm_runtime_put_noidle()  argument
6572 	struct cnss_pci_data *pci_priv = dev_get_drvdata(mhi_ctrl->cntrl_dev);  in cnss_mhi_pm_runtime_put_noidle()
6713 	mhi_ee = mhi_get_exec_env(pci_priv->mhi_ctrl);  in cnss_dev_rddm_timeout_hdlr()
6783 static void cnss_mhi_notify_status(struct mhi_controller *mhi_ctrl,  in cnss_mhi_notify_status()  argument
6786 	struct cnss_pci_data *pci_priv = dev_get_drvdata(mhi_ctrl->cntrl_dev);  in cnss_mhi_notify_status()
6871 	pci_priv->mhi_ctrl->irq = irq;  in cnss_pci_get_mhi_msi()
6872 	pci_priv->mhi_ctrl->nr_irqs = num_vectors;  in cnss_pci_get_mhi_msi()
6877 static int cnss_mhi_bw_scale(struct mhi_controller *mhi_ctrl,  in cnss_mhi_bw_scale()  argument
6880 	struct cnss_pci_data *pci_priv = dev_get_drvdata(mhi_ctrl->cntrl_dev);  in cnss_mhi_bw_scale()
6914 static int cnss_mhi_read_reg(struct mhi_controller *mhi_ctrl,  in cnss_mhi_read_reg()  argument
6917 	struct cnss_pci_data *pci_priv = dev_get_drvdata(mhi_ctrl->cntrl_dev);  in cnss_mhi_read_reg()
6931 static void cnss_mhi_write_reg(struct mhi_controller *mhi_ctrl,  in cnss_mhi_write_reg()  argument
6944 static inline int __cnss_get_mhi_soc_info(struct mhi_controller *mhi_ctrl)  in __cnss_get_mhi_soc_info()  argument
6946 	return mhi_get_soc_info(mhi_ctrl);  in __cnss_get_mhi_soc_info()
6959 static int __cnss_get_mhi_soc_info(struct mhi_controller *mhi_ctrl)  in __cnss_get_mhi_soc_info()  argument
6964 	ret = mhi_ctrl->read_reg(mhi_ctrl,  in __cnss_get_mhi_soc_info()
6965 				 mhi_ctrl->regs + SOC_HW_VERSION_OFFS,  in __cnss_get_mhi_soc_info()
6970 	mhi_ctrl->family_number = (soc_info & SOC_HW_VERSION_FAM_NUM_BMSK) >>  in __cnss_get_mhi_soc_info()
6972 	mhi_ctrl->device_number = (soc_info & SOC_HW_VERSION_DEV_NUM_BMSK) >>  in __cnss_get_mhi_soc_info()
6974 	mhi_ctrl->major_version = (soc_info & SOC_HW_VERSION_MAJOR_VER_BMSK) >>  in __cnss_get_mhi_soc_info()
6976 	mhi_ctrl->minor_version = (soc_info & SOC_HW_VERSION_MINOR_VER_BMSK) >>  in __cnss_get_mhi_soc_info()
6983 				 struct mhi_controller *mhi_ctrl)  in cnss_get_mhi_soc_info()  argument
6987 	ret = __cnss_get_mhi_soc_info(mhi_ctrl);  in cnss_get_mhi_soc_info()
6993 	plat_priv->device_version.family_number = mhi_ctrl->family_number;  in cnss_get_mhi_soc_info()
6994 	plat_priv->device_version.device_number = mhi_ctrl->device_number;  in cnss_get_mhi_soc_info()
6995 	plat_priv->device_version.major_version = mhi_ctrl->major_version;  in cnss_get_mhi_soc_info()
6996 	plat_priv->device_version.minor_version = mhi_ctrl->minor_version;  in cnss_get_mhi_soc_info()
7031 	struct mhi_controller *mhi_ctrl;  in cnss_pci_register_mhi()  local
7043 	mhi_ctrl = mhi_alloc_controller();  in cnss_pci_register_mhi()
7044 	if (!mhi_ctrl) {  in cnss_pci_register_mhi()
7049 	pci_priv->mhi_ctrl = mhi_ctrl;  in cnss_pci_register_mhi()
7050 	mhi_ctrl->cntrl_dev = &pci_dev->dev;  in cnss_pci_register_mhi()
7052 	mhi_ctrl->fw_image = plat_priv->firmware_name;  in cnss_pci_register_mhi()
7055 	mhi_ctrl->fallback_fw_image = plat_priv->fw_fallback_name;  in cnss_pci_register_mhi()
7058 	mhi_ctrl->regs = pci_priv->bar;  in cnss_pci_register_mhi()
7059 	mhi_ctrl->reg_len = pci_resource_len(pci_priv->pci_dev, PCI_BAR_NUM);  in cnss_pci_register_mhi()
7062 		    &bar_start, mhi_ctrl->reg_len);  in cnss_pci_register_mhi()
7071 		mhi_ctrl->irq_flags = IRQF_SHARED | IRQF_NOBALANCING;  in cnss_pci_register_mhi()
7074 		mhi_ctrl->iova_start = pci_priv->smmu_iova_start;  in cnss_pci_register_mhi()
7075 		mhi_ctrl->iova_stop = pci_priv->smmu_iova_start +  in cnss_pci_register_mhi()
7078 		mhi_ctrl->iova_start = 0;  in cnss_pci_register_mhi()
7079 		mhi_ctrl->iova_stop = pci_priv->dma_bit_mask;  in cnss_pci_register_mhi()
7082 	mhi_ctrl->status_cb = cnss_mhi_notify_status;  in cnss_pci_register_mhi()
7083 	mhi_ctrl->runtime_get = cnss_mhi_pm_runtime_get;  in cnss_pci_register_mhi()
7084 	mhi_ctrl->runtime_put = cnss_mhi_pm_runtime_put_noidle;  in cnss_pci_register_mhi()
7085 	mhi_ctrl->read_reg = cnss_mhi_read_reg;  in cnss_pci_register_mhi()
7086 	mhi_ctrl->write_reg = cnss_mhi_write_reg;  in cnss_pci_register_mhi()
7088 	mhi_ctrl->rddm_size = pci_priv->plat_priv->ramdump_info_v2.ramdump_size;  in cnss_pci_register_mhi()
7089 	if (!mhi_ctrl->rddm_size)  in cnss_pci_register_mhi()
7090 		mhi_ctrl->rddm_size = RAMDUMP_SIZE_DEFAULT;  in cnss_pci_register_mhi()
7093 		mhi_ctrl->sbl_size = SZ_256K;  in cnss_pci_register_mhi()
7095 		mhi_ctrl->sbl_size = SZ_512K;  in cnss_pci_register_mhi()
7097 	mhi_ctrl->seg_len = SZ_512K;  in cnss_pci_register_mhi()
7098 	mhi_ctrl->fbc_download = true;  in cnss_pci_register_mhi()
7100 	ret = cnss_get_mhi_soc_info(plat_priv, mhi_ctrl);  in cnss_pci_register_mhi()
7119 	mhi_ctrl->tme_supported_image = cnss_is_tme_supported(pci_priv);  in cnss_pci_register_mhi()
7121 	ret = mhi_register_controller(mhi_ctrl, cnss_mhi_config);  in cnss_pci_register_mhi()
7146 	mhi_unregister_controller(mhi_ctrl);  in cnss_pci_register_mhi()
7148 	kfree(mhi_ctrl->irq);  in cnss_pci_register_mhi()
7150 	mhi_free_controller(mhi_ctrl);  in cnss_pci_register_mhi()
7157 	struct mhi_controller *mhi_ctrl = pci_priv->mhi_ctrl;  in cnss_pci_unregister_mhi()  local
7162 	mhi_unregister_controller(mhi_ctrl);  in cnss_pci_unregister_mhi()
7163 	kfree(mhi_ctrl->irq);  in cnss_pci_unregister_mhi()
7164 	mhi_ctrl->irq = NULL;  in cnss_pci_unregister_mhi()
7165 	mhi_free_controller(mhi_ctrl);  in cnss_pci_unregister_mhi()
7166 	pci_priv->mhi_ctrl = NULL;  in cnss_pci_unregister_mhi()