37 int _cnss_pci_enumerate(struct cnss_plat_data *plat_priv, u32 rc_num)  in _cnss_pci_enumerate()  argument
165 	struct cnss_plat_data *plat_priv = pci_priv->plat_priv;  in cnss_pci_update_drv_supported()  local
189 		plat_priv->cap.cap_flag |= CNSS_HAS_DRV_SUPPORT;  in cnss_pci_update_drv_supported()
190 		cnss_set_feature_list(plat_priv, CNSS_DRV_SUPPORT_V01);  in cnss_pci_update_drv_supported()
199 	struct cnss_plat_data *plat_priv = NULL;  in cnss_pci_event_cb()  local
218 		plat_priv = pci_priv->plat_priv;  in cnss_pci_event_cb()
219 		if (!plat_priv) {  in cnss_pci_event_cb()
224 		plat_priv->ctrl_params.quirks |= BIT(LINK_DOWN_SELF_RECOVERY);  in cnss_pci_event_cb()
300 	struct cnss_plat_data *plat_priv = pci_priv->plat_priv;  in cnss_wlan_adsp_pc_enable()  local
305 	if (plat_priv->adsp_pc_enabled == control) {  in cnss_wlan_adsp_pc_enable()
322 	plat_priv->adsp_pc_enabled = control;  in cnss_wlan_adsp_pc_enable()
368 	struct cnss_plat_data *plat_priv;  in cnss_set_pci_link()  local
371 	plat_priv = pci_priv->plat_priv;  in cnss_set_pci_link()
372 	sw_ctrl_gpio = plat_priv->pinctrl_info.sw_ctrl_gpio;  in cnss_set_pci_link()
382 				    cnss_get_input_gpio_value(plat_priv, sw_ctrl_gpio));  in cnss_set_pci_link()
514 	struct cnss_plat_data *plat_priv = pci_priv->plat_priv;  in cnss_pci_is_force_one_msi()  local
516 	return test_bit(FORCE_ONE_MSI, &plat_priv->ctrl_params.quirks);  in cnss_pci_is_force_one_msi()
570 	struct cnss_plat_data *plat_priv = pci_priv->plat_priv;  in cnss_pci_init_smmu()  local
608 	res = platform_get_resource_byname(plat_priv->plat_dev, IORESOURCE_MEM,  in cnss_pci_init_smmu()