698 	struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);  in dp_tx_mlo_mcast_multipass_handler()  local
708 		dp_mlo_iter_ptnr_vdev(be_soc, be_vdev,  in dp_tx_mlo_mcast_multipass_handler()
745 		dp_mlo_iter_ptnr_vdev(be_soc, be_vdev,  in dp_tx_mlo_mcast_multipass_handler()
760 	dp_mlo_iter_ptnr_vdev(be_soc, be_vdev,  in dp_tx_mlo_mcast_multipass_handler()
856 	struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);  in dp_tx_mlo_mcast_handler_be()  local
862 	dp_mlo_iter_ptnr_vdev(be_soc, be_vdev,  in dp_tx_mlo_mcast_handler_be()
918 	struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);  in dp_tx_mlo_mcast_send_be()  local
946 			dp_mlo_iter_ptnr_vdev(be_soc, be_vdev,  in dp_tx_mlo_mcast_send_be()
1088 int dp_ppeds_tx_comp_handler(struct dp_soc_be *be_soc, uint32_t quota)  in dp_ppeds_tx_comp_handler()  argument
1097 	struct dp_soc *soc = &be_soc->soc;  in dp_ppeds_tx_comp_handler()
1103 				be_soc->ppeds_wbm_release_ring.hal_srng;  in dp_ppeds_tx_comp_handler()
1126 	srng = &be_soc->ppeds_wbm_release_ring;  in dp_ppeds_tx_comp_handler()
1131 				     &be_soc->ppeds_wbm_release_ring.stats);  in dp_ppeds_tx_comp_handler()
1146 			dp_assert_always_internal_ds_stat(0, be_soc,  in dp_ppeds_tx_comp_handler()
1156 			dp_assert_always_internal_ds_stat(0, be_soc,  in dp_ppeds_tx_comp_handler()
1164 			dp_assert_always_internal_ds_stat(0, be_soc,  in dp_ppeds_tx_comp_handler()
1440 dp_tx_get_ipa_bank_config(struct dp_soc_be *be_soc,  in dp_tx_get_ipa_bank_config()  argument
1444 	bank_config->encap_type = wlan_cfg_pkt_type(be_soc->soc.wlan_cfg_ctx);  in dp_tx_get_ipa_bank_config()
1461 static void dp_tx_init_ipa_bank_profile(struct dp_soc_be *be_soc)  in dp_tx_init_ipa_bank_profile()  argument
1466 	if (!wlan_cfg_is_ipa_enabled(be_soc->soc.wlan_cfg_ctx)) {  in dp_tx_init_ipa_bank_profile()
1467 		be_soc->ipa_bank_id = DP_BE_INVALID_BANK_ID;  in dp_tx_init_ipa_bank_profile()
1471 	dp_tx_get_ipa_bank_config(be_soc, &ipa_config);  in dp_tx_init_ipa_bank_profile()
1474 	bid = be_soc->num_bank_profiles - 1;  in dp_tx_init_ipa_bank_profile()
1476 	be_soc->bank_profiles[bid].is_configured = true;  in dp_tx_init_ipa_bank_profile()
1477 	be_soc->bank_profiles[bid].bank_config.val = ipa_config.val;  in dp_tx_init_ipa_bank_profile()
1478 	hal_tx_populate_bank_register(be_soc->soc.hal_soc,  in dp_tx_init_ipa_bank_profile()
1479 				      &be_soc->bank_profiles[bid].bank_config,  in dp_tx_init_ipa_bank_profile()
1481 	qdf_atomic_inc(&be_soc->bank_profiles[bid].ref_count);  in dp_tx_init_ipa_bank_profile()
1484 		be_soc->bank_profiles[bid].bank_config.val);  in dp_tx_init_ipa_bank_profile()
1486 	be_soc->ipa_bank_id = bid;  in dp_tx_init_ipa_bank_profile()
1489 static inline void dp_tx_init_ipa_bank_profile(struct dp_soc_be *be_soc)  in dp_tx_init_ipa_bank_profile()  argument
1494 QDF_STATUS dp_tx_init_bank_profiles(struct dp_soc_be *be_soc)  in dp_tx_init_bank_profiles()  argument
1498 	num_tcl_banks = hal_tx_get_num_tcl_banks(be_soc->soc.hal_soc);  in dp_tx_init_bank_profiles()
1501 	be_soc->num_bank_profiles = num_tcl_banks;  in dp_tx_init_bank_profiles()
1503 	be_soc->bank_profiles = qdf_mem_malloc(num_tcl_banks *  in dp_tx_init_bank_profiles()
1504 					       sizeof(*be_soc->bank_profiles));  in dp_tx_init_bank_profiles()
1505 	if (!be_soc->bank_profiles) {  in dp_tx_init_bank_profiles()
1510 	DP_TX_BANK_LOCK_CREATE(&be_soc->tx_bank_lock);  in dp_tx_init_bank_profiles()
1513 		be_soc->bank_profiles[i].is_configured = false;  in dp_tx_init_bank_profiles()
1514 		qdf_atomic_init(&be_soc->bank_profiles[i].ref_count);  in dp_tx_init_bank_profiles()
1516 	dp_info("initialized %u bank profiles", be_soc->num_bank_profiles);  in dp_tx_init_bank_profiles()
1518 	dp_tx_init_ipa_bank_profile(be_soc);  in dp_tx_init_bank_profiles()
1523 void dp_tx_deinit_bank_profiles(struct dp_soc_be *be_soc)  in dp_tx_deinit_bank_profiles()  argument
1525 	qdf_mem_free(be_soc->bank_profiles);  in dp_tx_deinit_bank_profiles()
1526 	DP_TX_BANK_LOCK_DESTROY(&be_soc->tx_bank_lock);  in dp_tx_deinit_bank_profiles()
1576 int dp_tx_get_bank_profile(struct dp_soc_be *be_soc,  in dp_tx_get_bank_profile()  argument
1590 	DP_TX_BANK_LOCK_ACQUIRE(&be_soc->tx_bank_lock);  in dp_tx_get_bank_profile()
1592 	for (i = 0; i < be_soc->num_bank_profiles; i++) {  in dp_tx_get_bank_profile()
1593 		if (be_soc->bank_profiles[i].is_configured &&  in dp_tx_get_bank_profile()
1594 		    (be_soc->bank_profiles[i].bank_config.val ^  in dp_tx_get_bank_profile()
1601 		    !be_soc->bank_profiles[i].is_configured)  in dp_tx_get_bank_profile()
1604 		    !qdf_atomic_read(&be_soc->bank_profiles[i].ref_count))  in dp_tx_get_bank_profile()
1629 	be_soc->bank_profiles[bank_id].is_configured = true;  in dp_tx_get_bank_profile()
1630 	be_soc->bank_profiles[bank_id].bank_config.val = vdev_config.val;  in dp_tx_get_bank_profile()
1631 	hal_tx_populate_bank_register(be_soc->soc.hal_soc,  in dp_tx_get_bank_profile()
1632 				      &be_soc->bank_profiles[bank_id].bank_config,  in dp_tx_get_bank_profile()
1635 	qdf_atomic_inc(&be_soc->bank_profiles[bank_id].ref_count);  in dp_tx_get_bank_profile()
1636 	DP_TX_BANK_LOCK_RELEASE(&be_soc->tx_bank_lock);  in dp_tx_get_bank_profile()
1640 		be_soc->bank_profiles[bank_id].bank_config.val,  in dp_tx_get_bank_profile()
1641 		qdf_atomic_read(&be_soc->bank_profiles[bank_id].ref_count));  in dp_tx_get_bank_profile()
1644 		be_soc->bank_profiles[bank_id].bank_config.epd,  in dp_tx_get_bank_profile()
1645 		be_soc->bank_profiles[bank_id].bank_config.encap_type,  in dp_tx_get_bank_profile()
1646 		be_soc->bank_profiles[bank_id].bank_config.encrypt_type,  in dp_tx_get_bank_profile()
1647 		be_soc->bank_profiles[bank_id].bank_config.src_buffer_swap,  in dp_tx_get_bank_profile()
1648 		be_soc->bank_profiles[bank_id].bank_config.link_meta_swap,  in dp_tx_get_bank_profile()
1649 		be_soc->bank_profiles[bank_id].bank_config.addrx_en,  in dp_tx_get_bank_profile()
1650 		be_soc->bank_profiles[bank_id].bank_config.addry_en,  in dp_tx_get_bank_profile()
1651 		be_soc->bank_profiles[bank_id].bank_config.mesh_enable,  in dp_tx_get_bank_profile()
1652 		be_soc->bank_profiles[bank_id].bank_config.vdev_id_check_en,  in dp_tx_get_bank_profile()
1653 		be_soc->bank_profiles[bank_id].bank_config.pmac_id,  in dp_tx_get_bank_profile()
1654 		be_soc->bank_profiles[bank_id].bank_config.mcast_pkt_ctrl);  in dp_tx_get_bank_profile()
1659 void dp_tx_put_bank_profile(struct dp_soc_be *be_soc,  in dp_tx_put_bank_profile()  argument
1662 	DP_TX_BANK_LOCK_ACQUIRE(&be_soc->tx_bank_lock);  in dp_tx_put_bank_profile()
1663 	qdf_atomic_dec(&be_soc->bank_profiles[be_vdev->bank_id].ref_count);  in dp_tx_put_bank_profile()
1664 	DP_TX_BANK_LOCK_RELEASE(&be_soc->tx_bank_lock);  in dp_tx_put_bank_profile()
1667 void dp_tx_update_bank_profile(struct dp_soc_be *be_soc,  in dp_tx_update_bank_profile()  argument
1670 	dp_tx_put_bank_profile(be_soc, be_vdev);  in dp_tx_update_bank_profile()
1671 	be_vdev->bank_id = dp_tx_get_bank_profile(be_soc, be_vdev);  in dp_tx_update_bank_profile()