184 	uint32_t reg_val = 0;  in hal_srng_hw_disable_generic()  local
192 		reg_val = SRNG_DST_REG_READ(srng, MISC) & ~(SRNG_ENABLE_BIT);  in hal_srng_hw_disable_generic()
193 		SRNG_DST_REG_WRITE(srng, MISC, reg_val);  in hal_srng_hw_disable_generic()
195 		reg_val = SRNG_SRC_REG_READ(srng, MISC) & ~(SRNG_ENABLE_BIT);  in hal_srng_hw_disable_generic()
196 		SRNG_SRC_REG_WRITE(srng, MISC, reg_val);  in hal_srng_hw_disable_generic()
252 	uint32_t reg_val = 0;  in hal_srng_src_hw_init_generic()  local
258 		reg_val = SRNG_SRC_REG_READ(srng, MISC);  in hal_srng_src_hw_init_generic()
259 		if (!(reg_val & SRNG_IDLE_STATE_BIT)) {  in hal_srng_src_hw_init_generic()
267 		reg_val = SRNG_SRC_REG_READ(srng, MISC) & ~(SRNG_ENABLE_BIT);  in hal_srng_src_hw_init_generic()
268 		SRNG_SRC_REG_WRITE(srng, MISC, reg_val);  in hal_srng_src_hw_init_generic()
271 	reg_val = 0;  in hal_srng_src_hw_init_generic()
276 		reg_val = SRNG_SM(SRNG_SRC_FLD(MSI1_BASE_MSB, ADDR),  in hal_srng_src_hw_init_generic()
280 		SRNG_SRC_REG_WRITE(srng, MSI1_BASE_MSB, reg_val);  in hal_srng_src_hw_init_generic()
288 	reg_val = SRNG_SM(SRNG_SRC_FLD(BASE_MSB, RING_BASE_ADDR_MSB),  in hal_srng_src_hw_init_generic()
292 	SRNG_SRC_REG_WRITE(srng, BASE_MSB, reg_val);  in hal_srng_src_hw_init_generic()
294 	reg_val = SRNG_SM(SRNG_SRC_FLD(ID, ENTRY_SIZE), srng->entry_size);  in hal_srng_src_hw_init_generic()
295 	SRNG_SRC_REG_WRITE(srng, ID, reg_val);  in hal_srng_src_hw_init_generic()
302 	reg_val = 0;  in hal_srng_src_hw_init_generic()
310 		reg_val |= SRNG_SM(SRNG_SRC_FLD(CONSUMER_INT_SETUP_IX0,  in hal_srng_src_hw_init_generic()
317 		reg_val |= SRNG_SM(SRNG_SRC_FLD(CONSUMER_INT_SETUP_IX0,  in hal_srng_src_hw_init_generic()
322 	SRNG_SRC_REG_WRITE(srng, CONSUMER_INT_SETUP_IX0, reg_val);  in hal_srng_src_hw_init_generic()
324 	reg_val = 0;  in hal_srng_src_hw_init_generic()
326 		reg_val |= SRNG_SM(SRNG_SRC_FLD(CONSUMER_INT_SETUP_IX1,  in hal_srng_src_hw_init_generic()
330 	SRNG_SRC_REG_WRITE(srng, CONSUMER_INT_SETUP_IX1, reg_val);  in hal_srng_src_hw_init_generic()
337 	reg_val = 0;  in hal_srng_src_hw_init_generic()
345 		reg_val |= SRNG_SM(SRNG_SRC_FLD(MISC, RING_ID_DISABLE), 1);  in hal_srng_src_hw_init_generic()
354 	reg_val |= ((srng->flags & HAL_SRNG_DATA_TLV_SWAP) ?  in hal_srng_src_hw_init_generic()
362 	reg_val |= SRNG_SM(SRNG_SRC_FLD(MISC, LOOPCNT_DISABLE), 1);  in hal_srng_src_hw_init_generic()
370 	reg_val |= SRNG_ENABLE_BIT;  in hal_srng_src_hw_init_generic()
372 	SRNG_SRC_REG_WRITE(srng, MISC, reg_val);  in hal_srng_src_hw_init_generic()
384 	uint32_t reg_val = 0;  in hal_srng_dst_msi2_setup()  local
389 		reg_val = SRNG_SM(SRNG_DST_FLD(MSI2_BASE_MSB, ADDR),  in hal_srng_dst_msi2_setup()
393 		SRNG_DST_REG_WRITE(srng, MSI2_BASE_MSB, reg_val);  in hal_srng_dst_msi2_setup()
407 	uint32_t reg_val = 0;  in hal_srng_dst_near_full_int_setup()  local
411 			reg_val |= SRNG_SM(SRNG_DST_FLD(PRODUCER_INT2_SETUP,  in hal_srng_dst_near_full_int_setup()
416 		reg_val |= SRNG_SM(SRNG_DST_FLD(PRODUCER_INT2_SETUP,  in hal_srng_dst_near_full_int_setup()
422 	SRNG_DST_REG_WRITE(srng, PRODUCER_INT2_SETUP, reg_val);  in hal_srng_dst_near_full_int_setup()
447 	uint32_t reg_val = 0;  in hal_srng_dst_hw_init_generic()  local
453 		reg_val = SRNG_DST_REG_READ(srng, MISC);  in hal_srng_dst_hw_init_generic()
454 		if (!(reg_val & SRNG_IDLE_STATE_BIT)) {  in hal_srng_dst_hw_init_generic()
459 		reg_val = SRNG_DST_REG_READ(srng, MISC) & ~(SRNG_ENABLE_BIT);  in hal_srng_dst_hw_init_generic()
460 		SRNG_DST_REG_WRITE(srng, MISC, reg_val);  in hal_srng_dst_hw_init_generic()
463 	reg_val = 0;  in hal_srng_dst_hw_init_generic()
468 		reg_val = SRNG_SM(SRNG_DST_FLD(MSI1_BASE_MSB, ADDR),  in hal_srng_dst_hw_init_generic()
472 		SRNG_DST_REG_WRITE(srng, MSI1_BASE_MSB, reg_val);  in hal_srng_dst_hw_init_generic()
480 	reg_val = SRNG_SM(SRNG_DST_FLD(BASE_MSB, RING_BASE_ADDR_MSB),  in hal_srng_dst_hw_init_generic()
484 	SRNG_DST_REG_WRITE(srng, BASE_MSB, reg_val);  in hal_srng_dst_hw_init_generic()
486 	reg_val = SRNG_SM(SRNG_DST_FLD(ID, RING_ID), srng->ring_id) |  in hal_srng_dst_hw_init_generic()
488 	SRNG_DST_REG_WRITE(srng, ID, reg_val);  in hal_srng_dst_hw_init_generic()
496 	reg_val = 0;  in hal_srng_dst_hw_init_generic()
498 		reg_val |= SRNG_SM(SRNG_DST_FLD(PRODUCER_INT_SETUP,  in hal_srng_dst_hw_init_generic()
504 		reg_val |= SRNG_SM(SRNG_DST_FLD(PRODUCER_INT_SETUP,  in hal_srng_dst_hw_init_generic()
510 	SRNG_DST_REG_WRITE(srng, PRODUCER_INT_SETUP, reg_val);  in hal_srng_dst_hw_init_generic()
531 	reg_val = ((srng->flags & HAL_SRNG_DATA_TLV_SWAP) ?  in hal_srng_dst_hw_init_generic()
544 	reg_val |= SRNG_ENABLE_BIT;  in hal_srng_dst_hw_init_generic()
546 	SRNG_DST_REG_WRITE(srng, MISC, reg_val);  in hal_srng_dst_hw_init_generic()
622 	uint32_t reg_val;  in hal_srng_set_msi_config()  local
640 		reg_val = 0;  in hal_srng_set_msi_config()
644 		reg_val = SRNG_SM(SRNG_SRC_FLD(MSI1_BASE_MSB, ADDR),  in hal_srng_set_msi_config()
648 		SRNG_SRC_REG_WRITE(srng, MSI1_BASE_MSB, reg_val);  in hal_srng_set_msi_config()
652 		reg_val = 0;  in hal_srng_set_msi_config()
655 			reg_val |= SRNG_SM(SRNG_SRC_FLD(CONSUMER_INT_SETUP_IX0,  in hal_srng_set_msi_config()
661 			reg_val |= SRNG_SM(SRNG_SRC_FLD(CONSUMER_INT_SETUP_IX0,  in hal_srng_set_msi_config()
666 		SRNG_SRC_REG_WRITE(srng, CONSUMER_INT_SETUP_IX0, reg_val);  in hal_srng_set_msi_config()
668 		reg_val = 0;  in hal_srng_set_msi_config()
672 		reg_val = SRNG_SM(SRNG_DST_FLD(MSI1_BASE_MSB, ADDR),  in hal_srng_set_msi_config()
676 		SRNG_DST_REG_WRITE(srng, MSI1_BASE_MSB, reg_val);  in hal_srng_set_msi_config()
680 		reg_val = 0;  in hal_srng_set_msi_config()
683 			reg_val |= SRNG_SM(SRNG_DST_FLD(PRODUCER_INT_SETUP,  in hal_srng_set_msi_config()
689 			reg_val |= SRNG_SM(SRNG_DST_FLD(PRODUCER_INT_SETUP,  in hal_srng_set_msi_config()
695 		SRNG_DST_REG_WRITE(srng, PRODUCER_INT_SETUP, reg_val);  in hal_srng_set_msi_config()