Lines Matching refs:srng
138 struct hal_srng *srng = (struct hal_srng *)hal_ring_hdl; in hal_get_hw_hptp_generic() local
142 if (!hal_soc || !srng) { in hal_get_hw_hptp_generic()
150 if (srng->ring_dir == HAL_SRNG_SRC_RING) { in hal_get_hw_hptp_generic()
151 *headp = SRNG_SRC_REG_READ(srng, HP); in hal_get_hw_hptp_generic()
152 *tailp = SRNG_SRC_REG_READ(srng, TP); in hal_get_hw_hptp_generic()
154 *headp = SRNG_DST_REG_READ(srng, HP); in hal_get_hw_hptp_generic()
155 *tailp = SRNG_DST_REG_READ(srng, TP); in hal_get_hw_hptp_generic()
169 void hal_srng_src_hw_write_cons_prefetch_timer(struct hal_srng *srng, in hal_srng_src_hw_write_cons_prefetch_timer() argument
172 SRNG_SRC_REG_WRITE(srng, CONSUMER_PREFETCH_TIMER, value); in hal_srng_src_hw_write_cons_prefetch_timer()
182 void hal_srng_hw_disable_generic(struct hal_soc *hal, struct hal_srng *srng) in hal_srng_hw_disable_generic() argument
186 HAL_SRNG_CONFIG(hal, srng->ring_type); in hal_srng_hw_disable_generic()
191 if (srng->ring_dir == HAL_SRNG_DST_RING) { in hal_srng_hw_disable_generic()
192 reg_val = SRNG_DST_REG_READ(srng, MISC) & ~(SRNG_ENABLE_BIT); in hal_srng_hw_disable_generic()
193 SRNG_DST_REG_WRITE(srng, MISC, reg_val); in hal_srng_hw_disable_generic()
195 reg_val = SRNG_SRC_REG_READ(srng, MISC) & ~(SRNG_ENABLE_BIT); in hal_srng_hw_disable_generic()
196 SRNG_SRC_REG_WRITE(srng, MISC, reg_val); in hal_srng_hw_disable_generic()
197 srng->prefetch_timer = in hal_srng_hw_disable_generic()
198 SRNG_SRC_REG_READ(srng, CONSUMER_PREFETCH_TIMER); in hal_srng_hw_disable_generic()
199 hal_srng_src_hw_write_cons_prefetch_timer(srng, 0); in hal_srng_hw_disable_generic()
204 void hal_srng_hw_disable_generic(struct hal_soc *hal, struct hal_srng *srng) in hal_srng_hw_disable_generic() argument
209 void hal_srng_src_hw_write_cons_prefetch_timer(struct hal_srng *srng, in hal_srng_src_hw_write_cons_prefetch_timer() argument
223 static void hal_wbm_idle_lsb_write_confirm(struct hal_srng *srng) in hal_wbm_idle_lsb_write_confirm() argument
225 if (srng->ring_id == HAL_SRNG_WBM_IDLE_LINK) { in hal_wbm_idle_lsb_write_confirm()
226 while (SRNG_SRC_REG_READ(srng, BASE_LSB) != in hal_wbm_idle_lsb_write_confirm()
227 ((unsigned int)srng->ring_base_paddr & 0xffffffff)) in hal_wbm_idle_lsb_write_confirm()
228 SRNG_SRC_REG_WRITE(srng, BASE_LSB, in hal_wbm_idle_lsb_write_confirm()
229 srng->ring_base_paddr & in hal_wbm_idle_lsb_write_confirm()
234 static void hal_wbm_idle_lsb_write_confirm(struct hal_srng *srng) in hal_wbm_idle_lsb_write_confirm() argument
249 struct hal_srng *srng, bool idle_check, in hal_srng_src_hw_init_generic() argument
255 hal_debug("hw_init srng %d", srng->ring_id); in hal_srng_src_hw_init_generic()
258 reg_val = SRNG_SRC_REG_READ(srng, MISC); in hal_srng_src_hw_init_generic()
260 hal_err("ring_id %d not in idle state", srng->ring_id); in hal_srng_src_hw_init_generic()
264 hal_srng_src_hw_write_cons_prefetch_timer(srng, in hal_srng_src_hw_init_generic()
265 srng->prefetch_timer); in hal_srng_src_hw_init_generic()
267 reg_val = SRNG_SRC_REG_READ(srng, MISC) & ~(SRNG_ENABLE_BIT); in hal_srng_src_hw_init_generic()
268 SRNG_SRC_REG_WRITE(srng, MISC, reg_val); in hal_srng_src_hw_init_generic()
273 if (srng->flags & HAL_SRNG_MSI_INTR) { in hal_srng_src_hw_init_generic()
274 SRNG_SRC_REG_WRITE(srng, MSI1_BASE_LSB, in hal_srng_src_hw_init_generic()
275 srng->msi_addr & 0xffffffff); in hal_srng_src_hw_init_generic()
277 (uint64_t)(srng->msi_addr) >> 32) | in hal_srng_src_hw_init_generic()
280 SRNG_SRC_REG_WRITE(srng, MSI1_BASE_MSB, reg_val); in hal_srng_src_hw_init_generic()
281 SRNG_SRC_REG_WRITE(srng, MSI1_DATA, in hal_srng_src_hw_init_generic()
282 qdf_cpu_to_le32(srng->msi_data)); in hal_srng_src_hw_init_generic()
285 SRNG_SRC_REG_WRITE(srng, BASE_LSB, srng->ring_base_paddr & 0xffffffff); in hal_srng_src_hw_init_generic()
286 hal_wbm_idle_lsb_write_confirm(srng); in hal_srng_src_hw_init_generic()
289 ((uint64_t)(srng->ring_base_paddr) >> 32)) | in hal_srng_src_hw_init_generic()
291 srng->entry_size * srng->num_entries); in hal_srng_src_hw_init_generic()
292 SRNG_SRC_REG_WRITE(srng, BASE_MSB, reg_val); in hal_srng_src_hw_init_generic()
294 reg_val = SRNG_SM(SRNG_SRC_FLD(ID, ENTRY_SIZE), srng->entry_size); in hal_srng_src_hw_init_generic()
295 SRNG_SRC_REG_WRITE(srng, ID, reg_val); in hal_srng_src_hw_init_generic()
309 if (srng->intr_timer_thres_us) { in hal_srng_src_hw_init_generic()
312 srng->intr_timer_thres_us >> 3); in hal_srng_src_hw_init_generic()
316 if (srng->intr_batch_cntr_thres_entries) { in hal_srng_src_hw_init_generic()
319 srng->intr_batch_cntr_thres_entries * in hal_srng_src_hw_init_generic()
320 srng->entry_size); in hal_srng_src_hw_init_generic()
322 SRNG_SRC_REG_WRITE(srng, CONSUMER_INT_SETUP_IX0, reg_val); in hal_srng_src_hw_init_generic()
325 if (srng->flags & HAL_SRNG_LOW_THRES_INTR_ENABLE) { in hal_srng_src_hw_init_generic()
327 LOW_THRESHOLD), srng->u.src_ring.low_threshold); in hal_srng_src_hw_init_generic()
330 SRNG_SRC_REG_WRITE(srng, CONSUMER_INT_SETUP_IX1, reg_val); in hal_srng_src_hw_init_generic()
338 if (srng->ring_id != HAL_SRNG_WBM_IDLE_LINK) { in hal_srng_src_hw_init_generic()
340 ((unsigned long)(srng->u.src_ring.tp_addr) - in hal_srng_src_hw_init_generic()
342 SRNG_SRC_REG_WRITE(srng, TP_ADDR_LSB, tp_addr & 0xffffffff); in hal_srng_src_hw_init_generic()
343 SRNG_SRC_REG_WRITE(srng, TP_ADDR_MSB, tp_addr >> 32); in hal_srng_src_hw_init_generic()
349 SRNG_SRC_REG_WRITE(srng, HP, idx * srng->entry_size); in hal_srng_src_hw_init_generic()
350 SRNG_SRC_REG_WRITE(srng, TP, idx * srng->entry_size); in hal_srng_src_hw_init_generic()
351 *srng->u.src_ring.tp_addr = idx * srng->entry_size; in hal_srng_src_hw_init_generic()
352 srng->u.src_ring.hp = idx * srng->entry_size; in hal_srng_src_hw_init_generic()
354 reg_val |= ((srng->flags & HAL_SRNG_DATA_TLV_SWAP) ? in hal_srng_src_hw_init_generic()
356 ((srng->flags & HAL_SRNG_RING_PTR_SWAP) ? in hal_srng_src_hw_init_generic()
358 ((srng->flags & HAL_SRNG_MSI_SWAP) ? in hal_srng_src_hw_init_generic()
372 SRNG_SRC_REG_WRITE(srng, MISC, reg_val); in hal_srng_src_hw_init_generic()
382 static inline void hal_srng_dst_msi2_setup(struct hal_srng *srng) in hal_srng_dst_msi2_setup() argument
386 if (srng->u.dst_ring.nf_irq_support) { in hal_srng_dst_msi2_setup()
387 SRNG_DST_REG_WRITE(srng, MSI2_BASE_LSB, in hal_srng_dst_msi2_setup()
388 srng->msi2_addr & 0xffffffff); in hal_srng_dst_msi2_setup()
390 (uint64_t)(srng->msi2_addr) >> 32) | in hal_srng_dst_msi2_setup()
393 SRNG_DST_REG_WRITE(srng, MSI2_BASE_MSB, reg_val); in hal_srng_dst_msi2_setup()
394 SRNG_DST_REG_WRITE(srng, MSI2_DATA, in hal_srng_dst_msi2_setup()
395 qdf_cpu_to_le32(srng->msi2_data)); in hal_srng_dst_msi2_setup()
405 static inline void hal_srng_dst_near_full_int_setup(struct hal_srng *srng) in hal_srng_dst_near_full_int_setup() argument
409 if (srng->u.dst_ring.nf_irq_support) { in hal_srng_dst_near_full_int_setup()
410 if (srng->intr_timer_thres_us) { in hal_srng_dst_near_full_int_setup()
413 srng->intr_timer_thres_us >> 3); in hal_srng_dst_near_full_int_setup()
418 srng->u.dst_ring.high_thresh * in hal_srng_dst_near_full_int_setup()
419 srng->entry_size); in hal_srng_dst_near_full_int_setup()
422 SRNG_DST_REG_WRITE(srng, PRODUCER_INT2_SETUP, reg_val); in hal_srng_dst_near_full_int_setup()
425 static inline void hal_srng_dst_msi2_setup(struct hal_srng *srng) in hal_srng_dst_msi2_setup() argument
429 static inline void hal_srng_dst_near_full_int_setup(struct hal_srng *srng) in hal_srng_dst_near_full_int_setup() argument
444 struct hal_srng *srng, bool idle_check, in hal_srng_dst_hw_init_generic() argument
450 hal_debug("hw_init srng %d", srng->ring_id); in hal_srng_dst_hw_init_generic()
453 reg_val = SRNG_DST_REG_READ(srng, MISC); in hal_srng_dst_hw_init_generic()
455 hal_err("ring_id %d not in idle state", srng->ring_id); in hal_srng_dst_hw_init_generic()
459 reg_val = SRNG_DST_REG_READ(srng, MISC) & ~(SRNG_ENABLE_BIT); in hal_srng_dst_hw_init_generic()
460 SRNG_DST_REG_WRITE(srng, MISC, reg_val); in hal_srng_dst_hw_init_generic()
465 if (srng->flags & HAL_SRNG_MSI_INTR) { in hal_srng_dst_hw_init_generic()
466 SRNG_DST_REG_WRITE(srng, MSI1_BASE_LSB, in hal_srng_dst_hw_init_generic()
467 srng->msi_addr & 0xffffffff); in hal_srng_dst_hw_init_generic()
469 (uint64_t)(srng->msi_addr) >> 32) | in hal_srng_dst_hw_init_generic()
472 SRNG_DST_REG_WRITE(srng, MSI1_BASE_MSB, reg_val); in hal_srng_dst_hw_init_generic()
473 SRNG_DST_REG_WRITE(srng, MSI1_DATA, in hal_srng_dst_hw_init_generic()
474 qdf_cpu_to_le32(srng->msi_data)); in hal_srng_dst_hw_init_generic()
476 hal_srng_dst_msi2_setup(srng); in hal_srng_dst_hw_init_generic()
479 SRNG_DST_REG_WRITE(srng, BASE_LSB, srng->ring_base_paddr & 0xffffffff); in hal_srng_dst_hw_init_generic()
481 ((uint64_t)(srng->ring_base_paddr) >> 32)) | in hal_srng_dst_hw_init_generic()
483 srng->entry_size * srng->num_entries); in hal_srng_dst_hw_init_generic()
484 SRNG_DST_REG_WRITE(srng, BASE_MSB, reg_val); in hal_srng_dst_hw_init_generic()
486 reg_val = SRNG_SM(SRNG_DST_FLD(ID, RING_ID), srng->ring_id) | in hal_srng_dst_hw_init_generic()
487 SRNG_SM(SRNG_DST_FLD(ID, ENTRY_SIZE), srng->entry_size); in hal_srng_dst_hw_init_generic()
488 SRNG_DST_REG_WRITE(srng, ID, reg_val); in hal_srng_dst_hw_init_generic()
497 if (srng->intr_timer_thres_us) { in hal_srng_dst_hw_init_generic()
500 srng->intr_timer_thres_us >> 3); in hal_srng_dst_hw_init_generic()
503 if (srng->intr_batch_cntr_thres_entries) { in hal_srng_dst_hw_init_generic()
506 srng->intr_batch_cntr_thres_entries * in hal_srng_dst_hw_init_generic()
507 srng->entry_size); in hal_srng_dst_hw_init_generic()
510 SRNG_DST_REG_WRITE(srng, PRODUCER_INT_SETUP, reg_val); in hal_srng_dst_hw_init_generic()
517 hal_srng_dst_near_full_int_setup(srng); in hal_srng_dst_hw_init_generic()
520 ((unsigned long)(srng->u.dst_ring.hp_addr) - in hal_srng_dst_hw_init_generic()
522 SRNG_DST_REG_WRITE(srng, HP_ADDR_LSB, hp_addr & 0xffffffff); in hal_srng_dst_hw_init_generic()
523 SRNG_DST_REG_WRITE(srng, HP_ADDR_MSB, hp_addr >> 32); in hal_srng_dst_hw_init_generic()
526 SRNG_DST_REG_WRITE(srng, HP, idx * srng->entry_size); in hal_srng_dst_hw_init_generic()
527 SRNG_DST_REG_WRITE(srng, TP, idx * srng->entry_size); in hal_srng_dst_hw_init_generic()
528 *srng->u.dst_ring.hp_addr = idx * srng->entry_size; in hal_srng_dst_hw_init_generic()
529 srng->u.dst_ring.tp = idx * srng->entry_size; in hal_srng_dst_hw_init_generic()
531 reg_val = ((srng->flags & HAL_SRNG_DATA_TLV_SWAP) ? in hal_srng_dst_hw_init_generic()
533 ((srng->flags & HAL_SRNG_RING_PTR_SWAP) ? in hal_srng_dst_hw_init_generic()
535 ((srng->flags & HAL_SRNG_MSI_SWAP) ? in hal_srng_dst_hw_init_generic()
546 SRNG_DST_REG_WRITE(srng, MISC, reg_val); in hal_srng_dst_hw_init_generic()
599 struct hal_srng *srng, bool idle_check, in hal_srng_src_hw_init_generic() argument
604 struct hal_srng *srng, bool idle_check, in hal_srng_dst_hw_init_generic() argument
620 struct hal_srng *srng = (struct hal_srng *)ring_hdl; in hal_srng_set_msi_config() local
624 srng->intr_timer_thres_us = ring_params->intr_timer_thres_us; in hal_srng_set_msi_config()
625 srng->intr_batch_cntr_thres_entries = in hal_srng_set_msi_config()
627 srng->msi_addr = ring_params->msi_addr; in hal_srng_set_msi_config()
628 srng->msi_data = ring_params->msi_data; in hal_srng_set_msi_config()
630 if (!srng->msi_addr && !srng->msi_data) { in hal_srng_set_msi_config()
631 if (srng->ring_dir == HAL_SRNG_SRC_RING) in hal_srng_set_msi_config()
632 SRNG_SRC_REG_WRITE(srng, MSI1_BASE_MSB, 0); in hal_srng_set_msi_config()
634 SRNG_DST_REG_WRITE(srng, MSI1_BASE_MSB, 0); in hal_srng_set_msi_config()
639 if (srng->ring_dir == HAL_SRNG_SRC_RING) { in hal_srng_set_msi_config()
642 SRNG_SRC_REG_WRITE(srng, MSI1_BASE_LSB, in hal_srng_set_msi_config()
643 srng->msi_addr & 0xffffffff); in hal_srng_set_msi_config()
645 (uint64_t)(srng->msi_addr) >> 32) | in hal_srng_set_msi_config()
648 SRNG_SRC_REG_WRITE(srng, MSI1_BASE_MSB, reg_val); in hal_srng_set_msi_config()
649 SRNG_SRC_REG_WRITE(srng, MSI1_DATA, in hal_srng_set_msi_config()
650 qdf_cpu_to_le32(srng->msi_data)); in hal_srng_set_msi_config()
654 if (srng->intr_timer_thres_us) { in hal_srng_set_msi_config()
657 srng->intr_timer_thres_us); in hal_srng_set_msi_config()
660 if (srng->intr_batch_cntr_thres_entries) { in hal_srng_set_msi_config()
663 srng->intr_batch_cntr_thres_entries * in hal_srng_set_msi_config()
664 srng->entry_size); in hal_srng_set_msi_config()
666 SRNG_SRC_REG_WRITE(srng, CONSUMER_INT_SETUP_IX0, reg_val); in hal_srng_set_msi_config()
670 SRNG_DST_REG_WRITE(srng, MSI1_BASE_LSB, in hal_srng_set_msi_config()
671 srng->msi_addr & 0xffffffff); in hal_srng_set_msi_config()
673 (uint64_t)(srng->msi_addr) >> 32) | in hal_srng_set_msi_config()
676 SRNG_DST_REG_WRITE(srng, MSI1_BASE_MSB, reg_val); in hal_srng_set_msi_config()
677 SRNG_DST_REG_WRITE(srng, MSI1_DATA, in hal_srng_set_msi_config()
678 qdf_cpu_to_le32(srng->msi_data)); in hal_srng_set_msi_config()
682 if (srng->intr_timer_thres_us) { in hal_srng_set_msi_config()
685 srng->intr_timer_thres_us >> 3); in hal_srng_set_msi_config()
688 if (srng->intr_batch_cntr_thres_entries) { in hal_srng_set_msi_config()
691 srng->intr_batch_cntr_thres_entries * in hal_srng_set_msi_config()
692 srng->entry_size); in hal_srng_set_msi_config()
695 SRNG_DST_REG_WRITE(srng, PRODUCER_INT_SETUP, reg_val); in hal_srng_set_msi_config()