Lines Matching refs:hif_info

4438 	hif_info("v3: num_config %d", cfg->num_shadow_reg_v3_cfg);  in hif_print_hal_shadow_register_cfg()
4440 hif_info("i %d, val %x", i, cfg->shadow_reg_v3_cfg[i].addr); in hif_print_hal_shadow_register_cfg()
4448 hif_info("v2: num_config %d", cfg->num_shadow_reg_v2_cfg); in hif_print_hal_shadow_register_cfg()
4450 hif_info("i %d, val %x", i, cfg->shadow_reg_v2_cfg[i].addr); in hif_print_hal_shadow_register_cfg()
4456 hif_info("CONFIG_SHADOW V2/V3 not defined"); in hif_print_hal_shadow_register_cfg()
5159 hif_info("target va %pK target pa %pa", scn->vaddr_qmi_bypass, in hif_post_static_buf_to_target()
5412 hif_info("X, ret = %d", rv); in hif_config_ce()
5884 struct hif_pipe_addl_info *hif_info, uint32_t pipe) in hif_get_addl_pipe_info() argument
5896 hif_info->ul_pipe.nentries = src_ring->nentries; in hif_get_addl_pipe_info()
5897 hif_info->ul_pipe.nentries_mask = src_ring->nentries_mask; in hif_get_addl_pipe_info()
5898 hif_info->ul_pipe.sw_index = src_ring->sw_index; in hif_get_addl_pipe_info()
5899 hif_info->ul_pipe.write_index = src_ring->write_index; in hif_get_addl_pipe_info()
5900 hif_info->ul_pipe.hw_index = src_ring->hw_index; in hif_get_addl_pipe_info()
5901 hif_info->ul_pipe.base_addr_CE_space = in hif_get_addl_pipe_info()
5903 hif_info->ul_pipe.base_addr_owner_space = in hif_get_addl_pipe_info()
5909 hif_info->dl_pipe.nentries = dest_ring->nentries; in hif_get_addl_pipe_info()
5910 hif_info->dl_pipe.nentries_mask = dest_ring->nentries_mask; in hif_get_addl_pipe_info()
5911 hif_info->dl_pipe.sw_index = dest_ring->sw_index; in hif_get_addl_pipe_info()
5912 hif_info->dl_pipe.write_index = dest_ring->write_index; in hif_get_addl_pipe_info()
5913 hif_info->dl_pipe.hw_index = dest_ring->hw_index; in hif_get_addl_pipe_info()
5914 hif_info->dl_pipe.base_addr_CE_space = in hif_get_addl_pipe_info()
5916 hif_info->dl_pipe.base_addr_owner_space = in hif_get_addl_pipe_info()
5920 hif_info->pci_mem = pci_resource_start(sc->pdev, 0); in hif_get_addl_pipe_info()
5921 hif_info->ctrl_addr = ce_state->ctrl_addr; in hif_get_addl_pipe_info()
5923 return hif_info; in hif_get_addl_pipe_info()