Lines Matching refs:hif_read32_mb
229 target_enable0 = hif_read32_mb(sc, sc->mem + Q6_ENABLE_REGISTER_0); in hif_pci_route_adrastea_interrupt()
230 target_enable1 = hif_read32_mb(sc, sc->mem + Q6_ENABLE_REGISTER_1); in hif_pci_route_adrastea_interrupt()
231 target_cause0 = hif_read32_mb(sc, sc->mem + Q6_CAUSE_REGISTER_0); in hif_pci_route_adrastea_interrupt()
232 target_cause1 = hif_read32_mb(sc, sc->mem + Q6_CAUSE_REGISTER_1); in hif_pci_route_adrastea_interrupt()
275 hif_read32_mb(scn, scn->mem + in pci_dispatch_interrupt()
311 host_enable = hif_read32_mb(sc, sc->mem + in hif_pci_legacy_ce_interrupt_handler()
313 host_cause = hif_read32_mb(sc, sc->mem + in hif_pci_legacy_ce_interrupt_handler()
345 hif_read32_mb(sc, sc->mem + in hif_pci_legacy_ce_interrupt_handler()
369 hif_read32_mb(sc, sc->mem + in hif_pci_legacy_ce_interrupt_handler()
373 hif_read32_mb(sc, sc->mem + in hif_pci_legacy_ce_interrupt_handler()
377 hif_read32_mb(sc, sc->mem + 0x80008), in hif_pci_legacy_ce_interrupt_handler()
378 hif_read32_mb(sc, sc->mem + 0x8000c)); in hif_pci_legacy_ce_interrupt_handler()
380 hif_read32_mb(sc, sc->mem + 0x80010), in hif_pci_legacy_ce_interrupt_handler()
381 hif_read32_mb(sc, sc->mem + 0x80014)); in hif_pci_legacy_ce_interrupt_handler()
383 hif_read32_mb(sc, sc->mem + 0x80018), in hif_pci_legacy_ce_interrupt_handler()
384 hif_read32_mb(sc, sc->mem + 0x8001c)); in hif_pci_legacy_ce_interrupt_handler()
484 hif_read32_mb(sc, (char *)(mem) + \
519 val = hif_read32_mb(scn, mem + PCIE_LOCAL_BASE_ADDRESS in hif_targ_is_awake()
631 hif_read32_mb(sc, mem + in hif_pci_device_warm_reset()
637 val = hif_read32_mb(sc, mem + in hif_pci_device_warm_reset()
642 hif_read32_mb(sc, mem + in hif_pci_device_warm_reset()
655 fw_indicator = hif_read32_mb(sc, mem + FW_INDICATOR_ADDRESS); in hif_pci_device_warm_reset()
661 hif_read32_mb(sc, mem + in hif_pci_device_warm_reset()
673 hif_read32_mb(sc, mem + in hif_pci_device_warm_reset()
681 hif_read32_mb(sc, mem + in hif_pci_device_warm_reset()
691 hif_read32_mb(sc, mem + in hif_pci_device_warm_reset()
697 val = hif_read32_mb(sc, mem + in hif_pci_device_warm_reset()
703 hif_read32_mb(sc, mem + in hif_pci_device_warm_reset()
710 hif_read32_mb(sc, mem + in hif_pci_device_warm_reset()
731 val = hif_read32_mb(sc, mem + FW_INDICATOR_ADDRESS); in hif_check_fw_reg()
761 val = hif_read32_mb(sc, sc->mem + PCIE_LOCAL_BASE_ADDRESS + in hif_check_soc_status()
769 hif_read32_mb(sc, sc->mem + PCIE_LOCAL_BASE_ADDRESS + in hif_check_soc_status()
776 hif_read32_mb(sc, sc->mem + in hif_check_soc_status()
779 hif_read32_mb(sc, sc->mem + in hif_check_soc_status()
794 hif_read32_mb(sc, sc->mem + RTC_SOC_BASE_ADDRESS + in hif_check_soc_status()
823 hif_read32_mb(sc, mem + GPIO_BASE_ADDRESS + in __hif_pci_dump_registers()
831 val = hif_read32_mb(sc, mem + GPIO_BASE_ADDRESS + in __hif_pci_dump_registers()
839 hif_read32_mb(sc, mem + GPIO_BASE_ADDRESS + in __hif_pci_dump_registers()
841 hif_read32_mb(sc, mem + GPIO_BASE_ADDRESS + in __hif_pci_dump_registers()
847 val = hif_read32_mb(sc, mem + GPIO_BASE_ADDRESS + in __hif_pci_dump_registers()
856 val = hif_read32_mb(sc, mem + CE_WRAPPER_BASE_ADDRESS + in __hif_pci_dump_registers()
865 hif_read32_mb(sc, mem + GPIO_BASE_ADDRESS + in __hif_pci_dump_registers()
867 hif_read32_mb(sc, mem + CE_WRAPPER_BASE_ADDRESS + in __hif_pci_dump_registers()
875 hif_read32_mb(sc, mem + ce_base + in __hif_pci_dump_registers()
885 val = hif_read32_mb(sc, mem + GPIO_BASE_ADDRESS in __hif_pci_dump_registers()
891 hif_read32_mb(sc, mem + ce_base + in __hif_pci_dump_registers()
897 hif_read32_mb(sc, mem + GPIO_BASE_ADDRESS + in __hif_pci_dump_registers()
908 val = hif_read32_mb(sc, mem + GPIO_BASE_ADDRESS + in __hif_pci_dump_registers()
918 hif_read32_mb(sc, mem + GPIO_BASE_ADDRESS + in __hif_pci_dump_registers()
927 hif_read32_mb(sc, mem + GPIO_BASE_ADDRESS + in __hif_pci_dump_registers()
932 hif_read32_mb(sc, mem + GPIO_BASE_ADDRESS + in __hif_pci_dump_registers()
934 hif_read32_mb(sc, mem + GPIO_BASE_ADDRESS + in __hif_pci_dump_registers()
1272 = CHIP_ID_REVISION_GET(hif_read32_mb(scn, scn->mem in hif_set_hia_extnd()
1454 host_interest_area = hif_read32_mb(scn, scn->mem + in hif_set_hia()
2030 !(hif_read32_mb(sc, c->mem + in hif_pci_probe_tgt_wakeup()
2046 fw_indicator = hif_read32_mb(sc, sc->mem + FW_INDICATOR_ADDRESS); in hif_pci_probe_tgt_wakeup()
2087 hif_read32_mb(sc, sc->mem + (SOC_CORE_BASE_ADDRESS | in hif_pci_configure_legacy_irq()
2351 value = hif_read32_mb(scn, address); in hif_pci_config_low_power_int_register()
2359 value = hif_read32_mb(scn, address); in hif_pci_config_low_power_int_register()
2651 hif_read32_mb(scn, pci_addr + PCIE_LOCAL_BASE_ADDRESS + in hif_log_soc_wakeup_timeout()
2655 hif_read32_mb(scn, pci_addr + PCIE_LOCAL_BASE_ADDRESS + in hif_log_soc_wakeup_timeout()
2803 hif_read32_mb(sc, sc->mem + SOC_CORE_BASE_ADDRESS + in hif_pci_target_sleep_state_adjust()
2805 hif_read32_mb(sc, sc->mem + SOC_CORE_BASE_ADDRESS + in hif_pci_target_sleep_state_adjust()
2807 hif_read32_mb(sc, sc->mem + SOC_CORE_BASE_ADDRESS + in hif_pci_target_sleep_state_adjust()
2809 hif_read32_mb(sc, sc->mem + SOC_CORE_BASE_ADDRESS + in hif_pci_target_sleep_state_adjust()
2811 hif_read32_mb(sc, sc->mem + CE_WRAPPER_BASE_ADDRESS + in hif_pci_target_sleep_state_adjust()
2825 value = hif_read32_mb(scn, addr); in hif_target_read_checked()
3617 tmp = hif_read32_mb(scn, scn->mem + (RTC_SOC_BASE_ADDRESS + in hif_trigger_timer_irq()
3643 (void)hif_read32_mb(scn, scn->mem + (SOC_CORE_BASE_ADDRESS | in hif_target_sync()
3660 fw_ind = hif_read32_mb(scn, scn->mem + in hif_target_sync()
3670 (void)hif_read32_mb(scn, scn->mem + in hif_target_sync()
3945 hif_read32_mb(scn, scn->mem + in hif_pci_irq_enable()
4057 value = hif_read32_mb( in hif_soc_wake_request()