Lines Matching refs:MISSING
67 #define MISSING 0 macro
106 #define MBOX_BASE_ADDRESS MISSING
107 #define INT_STATUS_ENABLE_ERROR_LSB MISSING
108 #define INT_STATUS_ENABLE_ERROR_MASK MISSING
109 #define INT_STATUS_ENABLE_CPU_LSB MISSING
110 #define INT_STATUS_ENABLE_CPU_MASK MISSING
111 #define INT_STATUS_ENABLE_COUNTER_LSB MISSING
112 #define INT_STATUS_ENABLE_COUNTER_MASK MISSING
113 #define INT_STATUS_ENABLE_MBOX_DATA_LSB MISSING
114 #define INT_STATUS_ENABLE_MBOX_DATA_MASK MISSING
115 #define ERROR_STATUS_ENABLE_RX_UNDERFLOW_LSB MISSING
116 #define ERROR_STATUS_ENABLE_RX_UNDERFLOW_MASK MISSING
117 #define ERROR_STATUS_ENABLE_TX_OVERFLOW_LSB MISSING
118 #define ERROR_STATUS_ENABLE_TX_OVERFLOW_MASK MISSING
119 #define COUNTER_INT_STATUS_ENABLE_BIT_LSB MISSING
120 #define COUNTER_INT_STATUS_ENABLE_BIT_MASK MISSING
121 #define INT_STATUS_ENABLE_ADDRESS MISSING
122 #define CPU_INT_STATUS_ENABLE_BIT_LSB MISSING
123 #define CPU_INT_STATUS_ENABLE_BIT_MASK MISSING
124 #define HOST_INT_STATUS_ADDRESS MISSING
125 #define CPU_INT_STATUS_ADDRESS MISSING
126 #define ERROR_INT_STATUS_ADDRESS MISSING
127 #define ERROR_INT_STATUS_WAKEUP_MASK MISSING
128 #define ERROR_INT_STATUS_WAKEUP_LSB MISSING
129 #define ERROR_INT_STATUS_RX_UNDERFLOW_MASK MISSING
130 #define ERROR_INT_STATUS_RX_UNDERFLOW_LSB MISSING
131 #define ERROR_INT_STATUS_TX_OVERFLOW_MASK MISSING
132 #define ERROR_INT_STATUS_TX_OVERFLOW_LSB MISSING
133 #define COUNT_DEC_ADDRESS MISSING
134 #define HOST_INT_STATUS_CPU_MASK MISSING
135 #define HOST_INT_STATUS_CPU_LSB MISSING
136 #define HOST_INT_STATUS_ERROR_MASK MISSING
137 #define HOST_INT_STATUS_ERROR_LSB MISSING
138 #define HOST_INT_STATUS_COUNTER_MASK MISSING
139 #define HOST_INT_STATUS_COUNTER_LSB MISSING
140 #define RX_LOOKAHEAD_VALID_ADDRESS MISSING
141 #define WINDOW_DATA_ADDRESS MISSING
142 #define WINDOW_READ_ADDR_ADDRESS MISSING
143 #define WINDOW_WRITE_ADDR_ADDRESS MISSING