230 #define __QDF_IPA_WDI_SETUP_INFO_EP_CFG(txrx)	\  argument
233 #define __QDF_IPA_WDI_SETUP_INFO_CLIENT(txrx)	\  argument
235 #define __QDF_IPA_WDI_SETUP_INFO_TRANSFER_RING_BASE_PA(txrx)	\  argument
237 #define __QDF_IPA_WDI_SETUP_INFO_TRANSFER_RING_SIZE(txrx)	\  argument
239 #define __QDF_IPA_WDI_SETUP_INFO_TRANSFER_RING_DOORBELL_PA(txrx)	\  argument
241 #define __QDF_IPA_WDI_SETUP_INFO_IS_TXR_RN_DB_PCIE_ADDR(txrx)  \  argument
243 #define __QDF_IPA_WDI_SETUP_INFO_EVENT_RING_BASE_PA(txrx)	\  argument
245 #define __QDF_IPA_WDI_SETUP_INFO_EVENT_RING_SIZE(txrx)	\  argument
247 #define __QDF_IPA_WDI_SETUP_INFO_EVENT_RING_DOORBELL_PA(txrx)	\  argument
249 #define __QDF_IPA_WDI_SETUP_INFO_IS_EVT_RN_DB_PCIE_ADDR(txrx) \  argument
251 #define __QDF_IPA_WDI_SETUP_INFO_NUM_PKT_BUFFERS(txrx)	\  argument
253 #define __QDF_IPA_WDI_SETUP_INFO_PKT_OFFSET(txrx)	\  argument
255 #define __QDF_IPA_WDI_SETUP_INFO_DESC_FORMAT_TEMPLATE(txrx)	\  argument
263 #define __QDF_IPA_WDI_SETUP_INFO_SMMU_EP_CFG(txrx)	\  argument
266 #define __QDF_IPA_WDI_SETUP_INFO_SMMU_CLIENT(txrx)	\  argument
268 #define __QDF_IPA_WDI_SETUP_INFO_SMMU_TRANSFER_RING_BASE(txrx)	\  argument
270 #define __QDF_IPA_WDI_SETUP_INFO_SMMU_TRANSFER_RING_SIZE(txrx)	\  argument
272 #define __QDF_IPA_WDI_SETUP_INFO_SMMU_TRANSFER_RING_DOORBELL_PA(txrx)	\  argument
274 #define __QDF_IPA_WDI_SETUP_INFO_SMMU_IS_TXR_RN_DB_PCIE_ADDR(txrx)  \  argument
277 #define __QDF_IPA_WDI_SETUP_INFO_SMMU_EVENT_RING_BASE(txrx)	\  argument
279 #define __QDF_IPA_WDI_SETUP_INFO_SMMU_EVENT_RING_SIZE(txrx)	\  argument
281 #define __QDF_IPA_WDI_SETUP_INFO_SMMU_EVENT_RING_DOORBELL_PA(txrx)	\  argument
283 #define __QDF_IPA_WDI_SETUP_INFO_SMMU_IS_EVT_RN_DB_PCIE_ADDR(txrx) \  argument
286 #define __QDF_IPA_WDI_SETUP_INFO_SMMU_NUM_PKT_BUFFERS(txrx)	\  argument
288 #define __QDF_IPA_WDI_SETUP_INFO_SMMU_PKT_OFFSET(txrx)	\  argument
290 #define __QDF_IPA_WDI_SETUP_INFO_SMMU_DESC_FORMAT_TEMPLATE(txrx)	\  argument
295 #define __QDF_IPA_WDI_SETUP_INFO_RX_BANK_ID(txrx, bid)	\  argument
298 #define __QDF_IPA_WDI_SETUP_INFO_SMMU_RX_BANK_ID(txrx, bid)	\  argument
308 #define __QDF_IPA_WDI_SETUP_INFO_RX_PMAC_ID(txrx, pmac_id)	\  argument
311 #define __QDF_IPA_WDI_SETUP_INFO_SMMU_RX_PMAC_ID(txrx, pmac_id)	\  argument
314 #define __QDF_IPA_WDI_SETUP_INFO_RX_PMAC_ID(txrx, pmac_id)  argument
315 #define __QDF_IPA_WDI_SETUP_INFO_SMMU_RX_PMAC_ID(txrx, pmac_id)  argument
318 #define __QDF_IPA_WDI_SETUP_INFO_RX_BANK_ID(txrx, bid)  argument
319 #define __QDF_IPA_WDI_SETUP_INFO_SMMU_RX_BANK_ID(txrx, bid)  argument
320 #define __QDF_IPA_WDI_SETUP_INFO_RX_PMAC_ID(txrx, pmac_id)  argument
321 #define __QDF_IPA_WDI_SETUP_INFO_SMMU_RX_PMAC_ID(txrx, pmac_id)  argument
855 #define __QDF_IPA_WDI_SETUP_INFO_NAT_EN(txrx)	\  argument
857 #define __QDF_IPA_WDI_SETUP_INFO_HDR_LEN(txrx)	\  argument
859 #define __QDF_IPA_WDI_SETUP_INFO_HDR_OFST_METADATA_VALID(txrx)	\  argument
861 #define __QDF_IPA_WDI_SETUP_INFO_HDR_METADATA_REG_VALID(txrx)	\  argument
863 #define __QDF_IPA_WDI_SETUP_INFO_HDR_OFST_PKT_SIZE_VALID(txrx)	\  argument
865 #define __QDF_IPA_WDI_SETUP_INFO_HDR_OFST_PKT_SIZE(txrx)	\  argument
867 #define __QDF_IPA_WDI_SETUP_INFO_HDR_ADDITIONAL_CONST_LEN(txrx)	\  argument
869 #define __QDF_IPA_WDI_SETUP_INFO_MODE(txrx)	\  argument
871 #define __QDF_IPA_WDI_SETUP_INFO_HDR_LITTLE_ENDIAN(txrx)	\  argument
874 #define __QDF_IPA_WDI_SETUP_INFO_CLIENT(txrx)	\  argument
876 #define __QDF_IPA_WDI_SETUP_INFO_TRANSFER_RING_BASE_PA(txrx)	\  argument
878 #define __QDF_IPA_WDI_SETUP_INFO_TRANSFER_RING_SIZE(txrx)	\  argument
880 #define __QDF_IPA_WDI_SETUP_INFO_TRANSFER_RING_DOORBELL_PA(txrx)	\  argument
882 #define __QDF_IPA_WDI_SETUP_INFO_EVENT_RING_BASE_PA(txrx)	\  argument
884 #define __QDF_IPA_WDI_SETUP_INFO_EVENT_RING_SIZE(txrx)	\  argument
886 #define __QDF_IPA_WDI_SETUP_INFO_EVENT_RING_DOORBELL_PA(txrx)	\  argument
888 #define __QDF_IPA_WDI_SETUP_INFO_NUM_PKT_BUFFERS(txrx)	\  argument
890 #define __QDF_IPA_WDI_SETUP_INFO_PKT_OFFSET(txrx)	\  argument
892 #define __QDF_IPA_WDI_SETUP_INFO_DESC_FORMAT_TEMPLATE(txrx)	\  argument