Lines Matching refs:CFG_VALUE_OR_DEFAULT
592 CFG_VALUE_OR_DEFAULT, "Max Memory (in MB) used by Tx Capture")
599 CFG_VALUE_OR_DEFAULT, "RBM_ID used by pdev 0 Tx capture")
606 CFG_VALUE_OR_DEFAULT, "RBM_ID used by pdev 1 Tx capture")
613 CFG_VALUE_OR_DEFAULT, "RBM_ID used by pdev 2 Tx capture")
620 CFG_VALUE_OR_DEFAULT, "RBM_ID used by pdev 3 Tx capture")
628 CFG_VALUE_OR_DEFAULT, "DP HTT packet type")
635 CFG_VALUE_OR_DEFAULT, "DP INT batch threshold Other")
642 CFG_VALUE_OR_DEFAULT, "DP INT batch threshold mon_dest")
649 CFG_VALUE_OR_DEFAULT, "DP INT batch threshold Rx")
656 CFG_VALUE_OR_DEFAULT, "DP INT threshold Tx")
663 CFG_VALUE_OR_DEFAULT, "DP INT batch threshold ppe2tcl")
670 CFG_VALUE_OR_DEFAULT, "DP INT timer threshold ppe2tcl")
677 CFG_VALUE_OR_DEFAULT, "DP INT timer threshold Other")
684 CFG_VALUE_OR_DEFAULT, "DP INT timer threshold mon dest")
691 CFG_VALUE_OR_DEFAULT, "DP INT timer threshold Rx")
698 CFG_VALUE_OR_DEFAULT, "DP INT timer threshold Reo ring")
705 CFG_VALUE_OR_DEFAULT, "DP INT timer threshold wbm release ring")
712 CFG_VALUE_OR_DEFAULT, "DP INT timer threshold Tx")
719 CFG_VALUE_OR_DEFAULT, "DP Max Alloc Size")
726 CFG_VALUE_OR_DEFAULT, "DP Max Clients")
733 CFG_VALUE_OR_DEFAULT, "DP Max Peer ID")
740 CFG_VALUE_OR_DEFAULT, "DP REO Destination Rings")
747 CFG_VALUE_OR_DEFAULT, "DP Tx Comp Rings")
754 CFG_VALUE_OR_DEFAULT, "DP TCL Data Rings")
761 CFG_VALUE_OR_DEFAULT, "DP NSS REO Destination Rings")
768 CFG_VALUE_OR_DEFAULT, "DP NSS TCL Data Rings")
775 CFG_VALUE_OR_DEFAULT, "DP Tx Descriptors")
782 CFG_VALUE_OR_DEFAULT, "DP Tx Descriptor of 3rd pool")
789 CFG_VALUE_OR_DEFAULT, "DP Tx Special Descriptors")
796 CFG_VALUE_OR_DEFAULT, "DP Tx Ext Descriptors")
803 CFG_VALUE_OR_DEFAULT, "DP Tx Ext Descriptors Pool")
810 CFG_VALUE_OR_DEFAULT, "DP PDEV Rx Ring")
817 CFG_VALUE_OR_DEFAULT, \
825 CFG_VALUE_OR_DEFAULT, "DP Rx Defrag Timeout")
832 CFG_VALUE_OR_DEFAULT, "DP Tx Completion Ring Size")
839 CFG_VALUE_OR_DEFAULT, "DP Tx Ring Size")
846 CFG_VALUE_OR_DEFAULT, "DP NSS completion Ring Size")
853 CFG_VALUE_OR_DEFAULT, "DP pdev LMAC ring")
860 CFG_VALUE_OR_DEFAULT, "DP time control back pressure")
867 CFG_VALUE_OR_DEFAULT, "DP rx buffer size")
874 CFG_VALUE_OR_DEFAULT, "DP array size for qref debug")
882 CFG_VALUE_OR_DEFAULT, "DP sawf stats config")
933 CFG_VALUE_OR_DEFAULT, "DP rx pending hl threshold")
955 CFG_VALUE_OR_DEFAULT, "DP rx pending lo threshold")
960 CFG_VALUE_OR_DEFAULT, "DP Base HW Mac ID")
1142 CFG_VALUE_OR_DEFAULT, "DP GRO Enable")
1153 CFG_VALUE_OR_DEFAULT, "DP tc ingress prio")
1234 CFG_VALUE_OR_DEFAULT, "DP WBM Release Ring")
1241 CFG_VALUE_OR_DEFAULT, "DP TCL Cmd_Credit ring")
1248 CFG_VALUE_OR_DEFAULT, "DP TCL status ring")
1255 CFG_VALUE_OR_DEFAULT, "DP REO reinject ring")
1262 CFG_VALUE_OR_DEFAULT, "DP Rx release ring")
1269 CFG_VALUE_OR_DEFAULT, "DP REO destination ring")
1276 CFG_VALUE_OR_DEFAULT, "DP REO exception ring")
1283 CFG_VALUE_OR_DEFAULT, "DP REO command ring")
1290 CFG_VALUE_OR_DEFAULT, "DP REO status ring")
1297 CFG_VALUE_OR_DEFAULT, "DP RXDMA buffer ring")
1304 CFG_VALUE_OR_DEFAULT, "DP RXDMA refilll ring")
1315 CFG_VALUE_OR_DEFAULT, "DP TX DESC limit 0")
1322 CFG_VALUE_OR_DEFAULT, "DP TX DESC limit 1")
1329 CFG_VALUE_OR_DEFAULT, "DP TX DESC limit 2")
1336 CFG_VALUE_OR_DEFAULT, "DP TX DEVICE limit")
1343 CFG_VALUE_OR_DEFAULT, "DP TX Special DEVICE limit")
1350 CFG_VALUE_OR_DEFAULT, "DP TX SW internode queue")
1357 CFG_VALUE_OR_DEFAULT, "DP Global TX descriptor count")
1364 CFG_VALUE_OR_DEFAULT, "DP Global special TX descriptor count")
1371 CFG_VALUE_OR_DEFAULT, "DP RXDMA monitor buffer ring")
1378 CFG_VALUE_OR_DEFAULT, "DP TX monitor buffer ring")
1385 CFG_VALUE_OR_DEFAULT, "DP RXDMA monitor destination ring")
1392 CFG_VALUE_OR_DEFAULT, "DP TX monitor destination ring")
1399 CFG_VALUE_OR_DEFAULT, "DP RXDMA monitor status ring")
1406 CFG_VALUE_OR_DEFAULT, "DP RXDMA monitor destination ring")
1413 CFG_VALUE_OR_DEFAULT, "DP SW2RXDMA link ring")
1420 CFG_VALUE_OR_DEFAULT, "RXDMA err destination ring")
1425 CFG_VALUE_OR_DEFAULT, "Enable excessive per packet logging")
1430 CFG_VALUE_OR_DEFAULT, "Start queue offset")
1435 CFG_VALUE_OR_DEFAULT, "Stop queue Threshold")
1440 CFG_VALUE_OR_DEFAULT, "IPA tx buffer size")
1445 CFG_VALUE_OR_DEFAULT, "IPA tx partition base")
1450 CFG_VALUE_OR_DEFAULT, "IPA rx indication ring count")
1459 CFG_VALUE_OR_DEFAULT, "Enable/Disable Data stall detection")
1466 CFG_VALUE_OR_DEFAULT, "DP RX SW DESC weight")
1473 CFG_VALUE_OR_DEFAULT, "DP RX SW DESC num")
1480 CFG_VALUE_OR_DEFAULT, \
1510 CFG_VALUE_OR_DEFAULT, "RX pointer update timer threshold")
1515 CFG_VALUE_OR_DEFAULT, "RX pointer update entries number threshold")
1522 CFG_VALUE_OR_DEFAULT, "RXDMA monitor rx drop threshold")
1529 CFG_VALUE_OR_DEFAULT, "Packet Log buffer size")
1540 CFG_VALUE_OR_DEFAULT, "REO Destination Rings Mapping")
1547 CFG_VALUE_OR_DEFAULT, "Radio0 to REO destination default mapping")
1554 CFG_VALUE_OR_DEFAULT, "Radio1 to REO destination default mapping")
1561 CFG_VALUE_OR_DEFAULT, "Radio2 to REO destination default mapping")
1586 CFG_VALUE_OR_DEFAULT, "NAPI scale factor for DP")
1593 CFG_VALUE_OR_DEFAULT, \
1694 CFG_VALUE_OR_DEFAULT, \
1744 CFG_VALUE_OR_DEFAULT, "IPA TCL ring size")
1768 CFG_VALUE_OR_DEFAULT, "IPA tx comp ring size")
1793 CFG_VALUE_OR_DEFAULT, \
1818 CFG_VALUE_OR_DEFAULT, \
1855 CFG_VALUE_OR_DEFAULT, "DP PPEDS Tx Descriptors")
1862 CFG_VALUE_OR_DEFAULT, "DP PPEDS Tx Desc hotlist length")
1869 CFG_VALUE_OR_DEFAULT, "DP PPEDS Tx Comp handler napi budget")
1880 CFG_VALUE_OR_DEFAULT, "DP REO2PPE ring")
1887 CFG_VALUE_OR_DEFAULT, "DP PPE2TCL rings")
1894 CFG_VALUE_OR_DEFAULT, "PPEDS enable per WiFi SoC")
1932 CFG_VALUE_OR_DEFAULT, "DP MLO Rx ring map")
1960 CFG_VALUE_OR_DEFAULT, "DP mpdu retry threshold 1")
1981 CFG_VALUE_OR_DEFAULT, "DP mpdu retry threshold 2")
2046 CFG_VALUE_OR_DEFAULT, "special frame to deliver to stack")
2058 CFG_VALUE_OR_DEFAULT, \