dp/htt/htt_internal.h

32 	(pdev->targetdef->d_RX_MSDU_END_4_FIRST_MSDU_MASK)
34 	(pdev->targetdef->d_RX_MSDU_END_4_FIRST_MSDU_LSB)
36 	(pdev->targetdef->d_RX_MPDU_START_0_RETRY_LSB)
38 	(pdev->targetdef->d_RX_MPDU_START_0_RETRY_MASK)
40 	(pdev->targetdef->d_RX_MPDU_START_0_SEQ_NUM_MASK)
42 	(pdev->targetdef->d_RX_MPDU_START_0_SEQ_NUM_LSB)
44 	(pdev->targetdef->d_RX_MPDU_START_2_PN_47_32_LSB)
46 	(pdev->targetdef->d_RX_MPDU_START_2_PN_47_32_MASK)
48 	(pdev->targetdef->d_RX_MPDU_START_2_TID_LSB)
50 	(pdev->targetdef->d_RX_MPDU_START_2_TID_MASK)
52 	(pdev->targetdef->d_RX_MSDU_END_1_KEY_ID_OCT_MASK)
54 	(pdev->targetdef->d_RX_MSDU_END_1_KEY_ID_OCT_LSB)
56 	(pdev->targetdef->d_RX_MSDU_END_1_EXT_WAPI_PN_63_48_MASK)
58 	(pdev->targetdef->d_RX_MSDU_END_1_EXT_WAPI_PN_63_48_LSB)
60 	(pdev->targetdef->d_RX_MSDU_END_4_LAST_MSDU_MASK)
62 	(pdev->targetdef->d_RX_MSDU_END_4_LAST_MSDU_LSB)
64 	(pdev->targetdef->d_RX_ATTENTION_0_MCAST_BCAST_MASK)
66 	(pdev->targetdef->d_RX_ATTENTION_0_MCAST_BCAST_LSB)
68 	(pdev->targetdef->d_RX_ATTENTION_0_FRAGMENT_MASK)
70 	(pdev->targetdef->d_RX_ATTENTION_0_FRAGMENT_LSB)
72 	(pdev->targetdef->d_RX_ATTENTION_0_MPDU_LENGTH_ERR_MASK)
74 	(pdev->targetdef->d_RX_FRAG_INFO_0_RING2_MORE_COUNT_MASK)
76 	(pdev->targetdef->d_RX_FRAG_INFO_0_RING2_MORE_COUNT_LSB)
78 	(pdev->targetdef->d_RX_MSDU_START_0_MSDU_LENGTH_MASK)
80 	(pdev->targetdef->d_RX_MSDU_START_0_MSDU_LENGTH_LSB)
82 	(pdev->targetdef->d_RX_MPDU_START_0_ENCRYPTED_MASK)
84 	(pdev->targetdef->d_RX_MPDU_START_0_ENCRYPTED_LSB)
86 	(pdev->targetdef->d_RX_ATTENTION_0_MORE_DATA_MASK)
88 	(pdev->targetdef->d_RX_ATTENTION_0_MSDU_DONE_MASK)
90 	(pdev->targetdef->d_RX_ATTENTION_0_TCP_UDP_CHKSUM_FAIL_MASK)
92 	(pdev->targetdef->d_RX_MSDU_START_2_DECAP_FORMAT_OFFSET)
94 	(pdev->targetdef->d_RX_MSDU_START_2_DECAP_FORMAT_LSB)
96 	(pdev->targetdef->d_RX_MSDU_START_2_DECAP_FORMAT_MASK)