1 /*
2  * Copyright © 2006, Intel Corporation.
3  *
4  * This program is free software; you can redistribute it and/or modify it
5  * under the terms and conditions of the GNU General Public License,
6  * version 2, as published by the Free Software Foundation.
7  *
8  * This program is distributed in the hope it will be useful, but WITHOUT
9  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
11  * more details.
12  *
13  * You should have received a copy of the GNU General Public License along with
14  * this program; if not, write to the Free Software Foundation, Inc.,
15  * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
16  *
17  */
18 #ifndef _ASYNC_TX_H_
19 #define _ASYNC_TX_H_
20 #include <linux/dmaengine.h>
21 #include <linux/spinlock.h>
22 #include <linux/interrupt.h>
23 
24 /* on architectures without dma-mapping capabilities we need to ensure
25  * that the asynchronous path compiles away
26  */
27 #ifdef CONFIG_HAS_DMA
28 #define __async_inline
29 #else
30 #define __async_inline __always_inline
31 #endif
32 
33 /**
34  * dma_chan_ref - object used to manage dma channels received from the
35  *   dmaengine core.
36  * @chan - the channel being tracked
37  * @node - node for the channel to be placed on async_tx_master_list
38  * @rcu - for list_del_rcu
39  * @count - number of times this channel is listed in the pool
40  *	(for channels with multiple capabiities)
41  */
42 struct dma_chan_ref {
43 	struct dma_chan *chan;
44 	struct list_head node;
45 	struct rcu_head rcu;
46 	atomic_t count;
47 };
48 
49 /**
50  * async_tx_flags - modifiers for the async_* calls
51  * @ASYNC_TX_XOR_ZERO_DST: this flag must be used for xor operations where the
52  * the destination address is not a source.  The asynchronous case handles this
53  * implicitly, the synchronous case needs to zero the destination block.
54  * @ASYNC_TX_XOR_DROP_DST: this flag must be used if the destination address is
55  * also one of the source addresses.  In the synchronous case the destination
56  * address is an implied source, whereas the asynchronous case it must be listed
57  * as a source.  The destination address must be the first address in the source
58  * array.
59  * @ASYNC_TX_ACK: immediately ack the descriptor, precludes setting up a
60  * dependency chain
61  * @ASYNC_TX_FENCE: specify that the next operation in the dependency
62  * chain uses this operation's result as an input
63  * @ASYNC_TX_PQ_XOR_DST: do not overwrite the syndrome but XOR it with the
64  * input data. Required for rmw case.
65  */
66 enum async_tx_flags {
67 	ASYNC_TX_XOR_ZERO_DST	 = (1 << 0),
68 	ASYNC_TX_XOR_DROP_DST	 = (1 << 1),
69 	ASYNC_TX_ACK		 = (1 << 2),
70 	ASYNC_TX_FENCE		 = (1 << 3),
71 	ASYNC_TX_PQ_XOR_DST	 = (1 << 4),
72 };
73 
74 /**
75  * struct async_submit_ctl - async_tx submission/completion modifiers
76  * @flags: submission modifiers
77  * @depend_tx: parent dependency of the current operation being submitted
78  * @cb_fn: callback routine to run at operation completion
79  * @cb_param: parameter for the callback routine
80  * @scribble: caller provided space for dma/page address conversions
81  */
82 struct async_submit_ctl {
83 	enum async_tx_flags flags;
84 	struct dma_async_tx_descriptor *depend_tx;
85 	dma_async_tx_callback cb_fn;
86 	void *cb_param;
87 	void *scribble;
88 };
89 
90 #if defined(CONFIG_DMA_ENGINE) && !defined(CONFIG_ASYNC_TX_CHANNEL_SWITCH)
91 #define async_tx_issue_pending_all dma_issue_pending_all
92 
93 /**
94  * async_tx_issue_pending - send pending descriptor to the hardware channel
95  * @tx: descriptor handle to retrieve hardware context
96  *
97  * Note: any dependent operations will have already been issued by
98  * async_tx_channel_switch, or (in the case of no channel switch) will
99  * be already pending on this channel.
100  */
async_tx_issue_pending(struct dma_async_tx_descriptor * tx)101 static inline void async_tx_issue_pending(struct dma_async_tx_descriptor *tx)
102 {
103 	if (likely(tx)) {
104 		struct dma_chan *chan = tx->chan;
105 		struct dma_device *dma = chan->device;
106 
107 		dma->device_issue_pending(chan);
108 	}
109 }
110 #ifdef CONFIG_ARCH_HAS_ASYNC_TX_FIND_CHANNEL
111 #include <asm/async_tx.h>
112 #else
113 #define async_tx_find_channel(dep, type, dst, dst_count, src, src_count, len) \
114 	 __async_tx_find_channel(dep, type)
115 struct dma_chan *
116 __async_tx_find_channel(struct async_submit_ctl *submit,
117 			enum dma_transaction_type tx_type);
118 #endif /* CONFIG_ARCH_HAS_ASYNC_TX_FIND_CHANNEL */
119 #else
async_tx_issue_pending_all(void)120 static inline void async_tx_issue_pending_all(void)
121 {
122 	do { } while (0);
123 }
124 
async_tx_issue_pending(struct dma_async_tx_descriptor * tx)125 static inline void async_tx_issue_pending(struct dma_async_tx_descriptor *tx)
126 {
127 	do { } while (0);
128 }
129 
130 static inline struct dma_chan *
async_tx_find_channel(struct async_submit_ctl * submit,enum dma_transaction_type tx_type,struct page ** dst,int dst_count,struct page ** src,int src_count,size_t len)131 async_tx_find_channel(struct async_submit_ctl *submit,
132 		      enum dma_transaction_type tx_type, struct page **dst,
133 		      int dst_count, struct page **src, int src_count,
134 		      size_t len)
135 {
136 	return NULL;
137 }
138 #endif
139 
140 /**
141  * async_tx_sync_epilog - actions to take if an operation is run synchronously
142  * @cb_fn: function to call when the transaction completes
143  * @cb_fn_param: parameter to pass to the callback routine
144  */
145 static inline void
async_tx_sync_epilog(struct async_submit_ctl * submit)146 async_tx_sync_epilog(struct async_submit_ctl *submit)
147 {
148 	if (submit->cb_fn)
149 		submit->cb_fn(submit->cb_param);
150 }
151 
152 typedef union {
153 	unsigned long addr;
154 	struct page *page;
155 	dma_addr_t dma;
156 } addr_conv_t;
157 
158 static inline void
init_async_submit(struct async_submit_ctl * args,enum async_tx_flags flags,struct dma_async_tx_descriptor * tx,dma_async_tx_callback cb_fn,void * cb_param,addr_conv_t * scribble)159 init_async_submit(struct async_submit_ctl *args, enum async_tx_flags flags,
160 		  struct dma_async_tx_descriptor *tx,
161 		  dma_async_tx_callback cb_fn, void *cb_param,
162 		  addr_conv_t *scribble)
163 {
164 	args->flags = flags;
165 	args->depend_tx = tx;
166 	args->cb_fn = cb_fn;
167 	args->cb_param = cb_param;
168 	args->scribble = scribble;
169 }
170 
171 void async_tx_submit(struct dma_chan *chan, struct dma_async_tx_descriptor *tx,
172 		     struct async_submit_ctl *submit);
173 
174 struct dma_async_tx_descriptor *
175 async_xor(struct page *dest, struct page **src_list, unsigned int offset,
176 	  int src_cnt, size_t len, struct async_submit_ctl *submit);
177 
178 struct dma_async_tx_descriptor *
179 async_xor_val(struct page *dest, struct page **src_list, unsigned int offset,
180 	      int src_cnt, size_t len, enum sum_check_flags *result,
181 	      struct async_submit_ctl *submit);
182 
183 struct dma_async_tx_descriptor *
184 async_memcpy(struct page *dest, struct page *src, unsigned int dest_offset,
185 	     unsigned int src_offset, size_t len,
186 	     struct async_submit_ctl *submit);
187 
188 struct dma_async_tx_descriptor *async_trigger_callback(struct async_submit_ctl *submit);
189 
190 struct dma_async_tx_descriptor *
191 async_gen_syndrome(struct page **blocks, unsigned int offset, int src_cnt,
192 		   size_t len, struct async_submit_ctl *submit);
193 
194 struct dma_async_tx_descriptor *
195 async_syndrome_val(struct page **blocks, unsigned int offset, int src_cnt,
196 		   size_t len, enum sum_check_flags *pqres, struct page *spare,
197 		   struct async_submit_ctl *submit);
198 
199 struct dma_async_tx_descriptor *
200 async_raid6_2data_recov(int src_num, size_t bytes, int faila, int failb,
201 			struct page **ptrs, struct async_submit_ctl *submit);
202 
203 struct dma_async_tx_descriptor *
204 async_raid6_datap_recov(int src_num, size_t bytes, int faila,
205 			struct page **ptrs, struct async_submit_ctl *submit);
206 
207 void async_tx_quiesce(struct dma_async_tx_descriptor **tx);
208 #endif /* _ASYNC_TX_H_ */
209