1 /*
2 * Copyright (c) 2016-2021 The Linux Foundation. All rights reserved.
3 * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
4 *
5 * Permission to use, copy, modify, and/or distribute this software for
6 * any purpose with or without fee is hereby granted, provided that the
7 * above copyright notice and this permission notice appear in all
8 * copies.
9 *
10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
11 * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
12 * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
13 * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
14 * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
15 * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
16 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
17 * PERFORMANCE OF THIS SOFTWARE.
18 */
19
20 #ifndef _HAL_LI_TX_H_
21 #define _HAL_LI_TX_H_
22
23 enum hal_li_tx_ret_buf_manager {
24 HAL_LI_WBM_SW0_BM_ID = 3,
25 HAL_LI_WBM_SW1_BM_ID = 4,
26 HAL_LI_WBM_SW2_BM_ID = 5,
27 HAL_LI_WBM_SW3_BM_ID = 6,
28 HAL_LI_WBM_SW4_BM_ID = 7,
29 };
30
31 /*---------------------------------------------------------------------------
32 * Function declarations and documentation
33 * ---------------------------------------------------------------------------
34 */
35
36 /*---------------------------------------------------------------------------
37 * TCL Descriptor accessor APIs
38 * ---------------------------------------------------------------------------
39 */
40
41 /**
42 * hal_tx_desc_set_buf_addr() - Fill Buffer Address information in Tx
43 * Descriptor
44 * @hal_soc_hdl: hal_soc handle
45 * @desc: Handle to Tx Descriptor
46 * @paddr: Physical Address
47 * @pool_id: Return Buffer Manager ID
48 * @desc_id: Descriptor ID
49 * @type: 0 - Address points to a MSDU buffer
50 * 1 - Address points to MSDU extension descriptor
51 *
52 * Return: void
53 */
54 static inline
hal_tx_desc_set_buf_addr(hal_soc_handle_t hal_soc_hdl,void * desc,dma_addr_t paddr,uint8_t pool_id,uint32_t desc_id,uint8_t type)55 void hal_tx_desc_set_buf_addr(hal_soc_handle_t hal_soc_hdl, void *desc,
56 dma_addr_t paddr,
57 uint8_t pool_id, uint32_t desc_id,
58 uint8_t type)
59 {
60 struct hal_soc *hal_soc = (struct hal_soc *)hal_soc_hdl;
61
62 hal_soc->ops->hal_tx_desc_set_buf_addr(desc, paddr, pool_id,
63 desc_id, type);
64 }
65
66 /**
67 * hal_tx_desc_set_lmac_id_li() - Set the lmac_id value
68 * @hal_soc_hdl: hal_soc handle
69 * @desc: Handle to Tx Descriptor
70 * @lmac_id: mac Id to ast matching
71 * b00 – mac 0
72 * b01 – mac 1
73 * b10 – mac 2
74 * b11 – all macs (legacy HK way)
75 *
76 * Return: void
77 */
hal_tx_desc_set_lmac_id_li(hal_soc_handle_t hal_soc_hdl,void * desc,uint8_t lmac_id)78 static inline void hal_tx_desc_set_lmac_id_li(hal_soc_handle_t hal_soc_hdl,
79 void *desc, uint8_t lmac_id)
80 {
81 struct hal_soc *hal_soc = (struct hal_soc *)hal_soc_hdl;
82
83 hal_soc->ops->hal_tx_desc_set_lmac_id(desc, lmac_id);
84 }
85
86 /**
87 * hal_tx_desc_set_search_type_li() - Set the search type value
88 * @hal_soc_hdl: hal_soc handle
89 * @desc: Handle to Tx Descriptor
90 * @search_type: search type
91 * 0 – Normal search
92 * 1 – Index based address search
93 * 2 – Index based flow search
94 *
95 * Return: void
96 */
hal_tx_desc_set_search_type_li(hal_soc_handle_t hal_soc_hdl,void * desc,uint8_t search_type)97 static inline void hal_tx_desc_set_search_type_li(hal_soc_handle_t hal_soc_hdl,
98 void *desc,
99 uint8_t search_type)
100 {
101 struct hal_soc *hal_soc = (struct hal_soc *)hal_soc_hdl;
102
103 hal_soc->ops->hal_tx_desc_set_search_type(desc, search_type);
104 }
105
106 /**
107 * hal_tx_desc_set_search_index_li() - Set the search index value
108 * @hal_soc_hdl: hal_soc handle
109 * @desc: Handle to Tx Descriptor
110 * @search_index: The index that will be used for index based address or
111 * flow search. The field is valid when 'search_type' is
112 * 1 0r 2
113 *
114 * Return: void
115 */
hal_tx_desc_set_search_index_li(hal_soc_handle_t hal_soc_hdl,void * desc,uint32_t search_index)116 static inline void hal_tx_desc_set_search_index_li(hal_soc_handle_t hal_soc_hdl,
117 void *desc,
118 uint32_t search_index)
119 {
120 struct hal_soc *hal_soc = (struct hal_soc *)hal_soc_hdl;
121
122 hal_soc->ops->hal_tx_desc_set_search_index(desc, search_index);
123 }
124
125 /**
126 * hal_tx_desc_set_cache_set_num() - Set the cache-set-num value
127 * @hal_soc_hdl: hal_soc handle
128 * @desc: Handle to Tx Descriptor
129 * @cache_num: Cache set number that should be used to cache the index
130 * based search results, for address and flow search.
131 * This value should be equal to LSB four bits of the hash value
132 * of match data, in case of search index points to an entry
133 * which may be used in content based search also. The value can
134 * be anything when the entry pointed by search index will not be
135 * used for content based search.
136 *
137 * Return: void
138 */
hal_tx_desc_set_cache_set_num(hal_soc_handle_t hal_soc_hdl,void * desc,uint8_t cache_num)139 static inline void hal_tx_desc_set_cache_set_num(hal_soc_handle_t hal_soc_hdl,
140 void *desc,
141 uint8_t cache_num)
142 {
143 struct hal_soc *hal_soc = (struct hal_soc *)hal_soc_hdl;
144
145 hal_soc->ops->hal_tx_desc_set_cache_set_num(desc, cache_num);
146 }
147
148 /**
149 * hal_tx_desc_set_buf_length - Set Data length in bytes in Tx Descriptor
150 * @desc: Handle to Tx Descriptor
151 * @data_length: MSDU length in case of direct descriptor.
152 * Length of link extension descriptor in case of Link extension
153 * descriptor.Includes the length of Metadata
154 * Return: None
155 */
hal_tx_desc_set_buf_length(void * desc,uint16_t data_length)156 static inline void hal_tx_desc_set_buf_length(void *desc,
157 uint16_t data_length)
158 {
159 HAL_SET_FLD(desc, TCL_DATA_CMD_3, DATA_LENGTH) |=
160 HAL_TX_SM(TCL_DATA_CMD_3, DATA_LENGTH, data_length);
161 }
162
163 /**
164 * hal_tx_desc_set_buf_offset - Sets Packet Offset field in Tx descriptor
165 * @desc: Handle to Tx Descriptor
166 * @offset: Packet offset from Metadata in case of direct buffer descriptor.
167 *
168 * Return: void
169 */
hal_tx_desc_set_buf_offset(void * desc,uint8_t offset)170 static inline void hal_tx_desc_set_buf_offset(void *desc,
171 uint8_t offset)
172 {
173 HAL_SET_FLD(desc, TCL_DATA_CMD_3, PACKET_OFFSET) |=
174 HAL_TX_SM(TCL_DATA_CMD_3, PACKET_OFFSET, offset);
175 }
176
177 /**
178 * hal_tx_desc_set_encap_type - Set encapsulation type in Tx Descriptor
179 * @desc: Handle to Tx Descriptor
180 * @encap_type: Encapsulation that HW will perform
181 *
182 * Return: void
183 *
184 */
hal_tx_desc_set_encap_type(void * desc,enum hal_tx_encap_type encap_type)185 static inline void hal_tx_desc_set_encap_type(void *desc,
186 enum hal_tx_encap_type encap_type)
187 {
188 HAL_SET_FLD(desc, TCL_DATA_CMD_2, ENCAP_TYPE) |=
189 HAL_TX_SM(TCL_DATA_CMD_2, ENCAP_TYPE, encap_type);
190 }
191
192 /**
193 * hal_tx_desc_set_encrypt_type - Sets the Encrypt Type in Tx Descriptor
194 * @desc: Handle to Tx Descriptor
195 * @type: Encrypt Type
196 *
197 * Return: void
198 */
hal_tx_desc_set_encrypt_type(void * desc,enum hal_tx_encrypt_type type)199 static inline void hal_tx_desc_set_encrypt_type(void *desc,
200 enum hal_tx_encrypt_type type)
201 {
202 HAL_SET_FLD(desc, TCL_DATA_CMD_2, ENCRYPT_TYPE) |=
203 HAL_TX_SM(TCL_DATA_CMD_2, ENCRYPT_TYPE, type);
204 }
205
206 /**
207 * hal_tx_desc_set_addr_search_flags - Enable AddrX and AddrY search flags
208 * @desc: Handle to Tx Descriptor
209 * @flags: Bit 0 - AddrY search enable, Bit 1 - AddrX search enable
210 *
211 * Return: void
212 */
hal_tx_desc_set_addr_search_flags(void * desc,uint8_t flags)213 static inline void hal_tx_desc_set_addr_search_flags(void *desc,
214 uint8_t flags)
215 {
216 HAL_SET_FLD(desc, TCL_DATA_CMD_2, ADDRX_EN) |=
217 HAL_TX_SM(TCL_DATA_CMD_2, ADDRX_EN, (flags & 0x1));
218
219 HAL_SET_FLD(desc, TCL_DATA_CMD_2, ADDRY_EN) |=
220 HAL_TX_SM(TCL_DATA_CMD_2, ADDRY_EN, (flags >> 1));
221 }
222
223 /**
224 * hal_tx_desc_set_l4_checksum_en - Set TCP/IP checksum enable flags
225 * Tx Descriptor for MSDU_buffer type
226 * @desc: Handle to Tx Descriptor
227 * @en: UDP/TCP over ipv4/ipv6 checksum enable flags (5 bits)
228 *
229 * Return: void
230 */
hal_tx_desc_set_l4_checksum_en(void * desc,uint8_t en)231 static inline void hal_tx_desc_set_l4_checksum_en(void *desc,
232 uint8_t en)
233 {
234 HAL_SET_FLD(desc, TCL_DATA_CMD_3, IPV4_CHECKSUM_EN) |=
235 (HAL_TX_SM(TCL_DATA_CMD_3, UDP_OVER_IPV4_CHECKSUM_EN, en) |
236 HAL_TX_SM(TCL_DATA_CMD_3, UDP_OVER_IPV6_CHECKSUM_EN, en) |
237 HAL_TX_SM(TCL_DATA_CMD_3, TCP_OVER_IPV4_CHECKSUM_EN, en) |
238 HAL_TX_SM(TCL_DATA_CMD_3, TCP_OVER_IPV6_CHECKSUM_EN, en));
239 }
240
241 /**
242 * hal_tx_desc_set_l3_checksum_en() - Set IPv4 checksum enable flag in
243 * Tx Descriptor for MSDU_buffer type
244 * @desc: Handle to Tx Descriptor
245 * @en: ipv4 checksum enable flags
246 *
247 * Return: void
248 */
hal_tx_desc_set_l3_checksum_en(void * desc,uint8_t en)249 static inline void hal_tx_desc_set_l3_checksum_en(void *desc,
250 uint8_t en)
251 {
252 HAL_SET_FLD(desc, TCL_DATA_CMD_3, IPV4_CHECKSUM_EN) |=
253 HAL_TX_SM(TCL_DATA_CMD_3, IPV4_CHECKSUM_EN, en);
254 }
255
256 /**
257 * hal_tx_desc_set_fw_metadata() - Sets the metadata that is part of
258 * TCL descriptor
259 * @desc:Handle to Tx Descriptor
260 * @metadata: Metadata to be sent to Firmware
261 *
262 * Return: void
263 */
hal_tx_desc_set_fw_metadata(void * desc,uint16_t metadata)264 static inline void hal_tx_desc_set_fw_metadata(void *desc,
265 uint16_t metadata)
266 {
267 HAL_SET_FLD(desc, TCL_DATA_CMD_2, TCL_CMD_NUMBER) |=
268 HAL_TX_SM(TCL_DATA_CMD_2, TCL_CMD_NUMBER, metadata);
269 }
270
271 /**
272 * hal_tx_desc_set_to_fw() - Set To_FW bit in Tx Descriptor.
273 * @desc:Handle to Tx Descriptor
274 * @to_fw: if set, Forward packet to FW along with classification result
275 *
276 * Return: void
277 */
hal_tx_desc_set_to_fw(void * desc,uint8_t to_fw)278 static inline void hal_tx_desc_set_to_fw(void *desc, uint8_t to_fw)
279 {
280 HAL_SET_FLD(desc, TCL_DATA_CMD_3, TO_FW) |=
281 HAL_TX_SM(TCL_DATA_CMD_3, TO_FW, to_fw);
282 }
283
284 /**
285 * hal_tx_desc_set_mesh_en() - Set mesh_enable flag in Tx descriptor
286 * @hal_soc_hdl: hal soc handle
287 * @desc: Handle to Tx Descriptor
288 * @en: For raw WiFi frames, this indicates transmission to a mesh STA,
289 * enabling the interpretation of the 'Mesh Control Present' bit
290 * (bit 8) of QoS Control (otherwise this bit is ignored),
291 * For native WiFi frames, this indicates that a 'Mesh Control' field
292 * is present between the header and the LLC.
293 *
294 * Return: void
295 */
hal_tx_desc_set_mesh_en(hal_soc_handle_t hal_soc_hdl,void * desc,uint8_t en)296 static inline void hal_tx_desc_set_mesh_en(hal_soc_handle_t hal_soc_hdl,
297 void *desc, uint8_t en)
298 {
299 struct hal_soc *hal_soc = (struct hal_soc *)hal_soc_hdl;
300
301 hal_soc->ops->hal_tx_desc_set_mesh_en(desc, en);
302 }
303
304 /**
305 * hal_tx_desc_set_hlos_tid() - Set the TID value (override DSCP/PCP fields in
306 * frame) to be used for Tx Frame
307 * @desc: Handle to Tx Descriptor
308 * @hlos_tid: HLOS TID
309 *
310 * Return: void
311 */
hal_tx_desc_set_hlos_tid(void * desc,uint8_t hlos_tid)312 static inline void hal_tx_desc_set_hlos_tid(void *desc,
313 uint8_t hlos_tid)
314 {
315 HAL_SET_FLD(desc, TCL_DATA_CMD_4, HLOS_TID) |=
316 HAL_TX_SM(TCL_DATA_CMD_4, HLOS_TID, hlos_tid);
317
318 HAL_SET_FLD(desc, TCL_DATA_CMD_4, HLOS_TID_OVERWRITE) |=
319 HAL_TX_SM(TCL_DATA_CMD_4, HLOS_TID_OVERWRITE, 1);
320 }
321
322 /**
323 * hal_tx_desc_set_dscp_tid_table_id() - Sets DSCP to TID conversion table ID
324 * @hal_soc_hdl: Handle to HAL SoC structure
325 * @desc: Handle to Tx Descriptor
326 * @id: DSCP to tid conversion table to be used for this frame
327 *
328 * Return: void
329 */
330 static inline
hal_tx_desc_set_dscp_tid_table_id(hal_soc_handle_t hal_soc_hdl,void * desc,uint8_t id)331 void hal_tx_desc_set_dscp_tid_table_id(hal_soc_handle_t hal_soc_hdl,
332 void *desc, uint8_t id)
333 {
334 struct hal_soc *hal_soc = (struct hal_soc *)hal_soc_hdl;
335
336 hal_soc->ops->hal_tx_desc_set_dscp_tid_table_id(desc, id);
337 }
338
339 /**
340 * hal_tx_desc_clear() - Clear the HW descriptor entry
341 * @hw_desc: Hardware descriptor to be cleared
342 *
343 * Return: void
344 */
hal_tx_desc_clear(void * hw_desc)345 static inline void hal_tx_desc_clear(void *hw_desc)
346 {
347 qdf_mem_set(hw_desc + sizeof(struct tlv_32_hdr),
348 HAL_TX_DESC_LEN_BYTES, 0);
349 }
350
351 /**
352 * hal_tx_desc_sync() - Commit the descriptor to Hardware
353 * @hal_tx_desc_cached: Cached descriptor that software maintains
354 * @hw_desc: Hardware descriptor to be updated
355 */
hal_tx_desc_sync(void * hal_tx_desc_cached,void * hw_desc)356 static inline void hal_tx_desc_sync(void *hal_tx_desc_cached,
357 void *hw_desc)
358 {
359 qdf_mem_copy((hw_desc + sizeof(struct tlv_32_hdr)),
360 hal_tx_desc_cached, HAL_TX_DESC_LEN_BYTES);
361 }
362
363 /*---------------------------------------------------------------------------
364 * WBM Descriptor accessor APIs for Tx completions
365 *---------------------------------------------------------------------------
366 */
367
368 /**
369 * hal_tx_get_wbm_sw0_bm_id() - Get the BM ID for first tx completion ring
370 *
371 * Return: BM ID for first tx completion ring
372 */
hal_tx_get_wbm_sw0_bm_id(void)373 static inline uint32_t hal_tx_get_wbm_sw0_bm_id(void)
374 {
375 return HAL_LI_WBM_SW0_BM_ID;
376 }
377
378 /**
379 * hal_tx_comp_get_desc_id() - Get TX descriptor id within comp descriptor
380 * @hal_desc: completion ring descriptor pointer
381 *
382 * This function will tx descriptor id, cookie, within hardware completion
383 * descriptor
384 *
385 * Return: cookie
386 */
hal_tx_comp_get_desc_id(void * hal_desc)387 static inline uint32_t hal_tx_comp_get_desc_id(void *hal_desc)
388 {
389 uint32_t comp_desc =
390 *(uint32_t *)(((uint8_t *)hal_desc) +
391 BUFFER_ADDR_INFO_1_SW_BUFFER_COOKIE_OFFSET);
392
393 /* Cookie is placed on 2nd word */
394 return (comp_desc & BUFFER_ADDR_INFO_1_SW_BUFFER_COOKIE_MASK) >>
395 BUFFER_ADDR_INFO_1_SW_BUFFER_COOKIE_LSB;
396 }
397
398 /**
399 * hal_tx_comp_get_paddr() - Get paddr within comp descriptor
400 * @hal_desc: completion ring descriptor pointer
401 *
402 * This function will get buffer physical address within hardware completion
403 * descriptor
404 *
405 * Return: Buffer physical address
406 */
hal_tx_comp_get_paddr(void * hal_desc)407 static inline qdf_dma_addr_t hal_tx_comp_get_paddr(void *hal_desc)
408 {
409 uint32_t paddr_lo;
410 uint32_t paddr_hi;
411
412 paddr_lo = *(uint32_t *)(((uint8_t *)hal_desc) +
413 BUFFER_ADDR_INFO_0_BUFFER_ADDR_31_0_OFFSET);
414
415 paddr_hi = *(uint32_t *)(((uint8_t *)hal_desc) +
416 BUFFER_ADDR_INFO_1_BUFFER_ADDR_39_32_OFFSET);
417
418 paddr_hi = (paddr_hi & BUFFER_ADDR_INFO_1_BUFFER_ADDR_39_32_MASK) >>
419 BUFFER_ADDR_INFO_1_BUFFER_ADDR_39_32_LSB;
420
421 return (qdf_dma_addr_t)(paddr_lo | (((uint64_t)paddr_hi) << 32));
422 }
423 #endif /* _HAL_LI_TX_H_ */
424