1 /*
2 * Copyright (c) 2017-2019, 2021 The Linux Foundation. All rights reserved.
3 * Copyright (c) 2021-2023, Qualcomm Innovation Center, Inc. All rights reserved.
4 *
5 * Permission to use, copy, modify, and/or distribute this software for
6 * any purpose with or without fee is hereby granted, provided that the
7 * above copyright notice and this permission notice appear in all
8 * copies.
9 *
10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
11 * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
12 * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
13 * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
14 * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
15 * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
16 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
17 * PERFORMANCE OF THIS SOFTWARE.
18 */
19
20 #ifndef _HAL_REO_BE_H_
21 #define _HAL_REO_BE_H_
22
23 #include "hal_be_hw_headers.h"
24 #include "hal_rx.h"
25 #include "hal_reo.h"
26
27 #define HAL_REO_QUEUE_EXT_DESC 10
28 #define HAL_MAX_REO2SW_RINGS 8
29 #define HAL_NUM_RX_RING_PER_IX_MAP 8
30
31 #if defined(QCA_VDEV_STATS_HW_OFFLOAD_SUPPORT) && \
32 defined(RX_REO_QUEUE_STATISTICS_COUNTER_INDEX_MASK)
hal_update_stats_counter_index(uint32_t * reo_queue_desc,uint8_t vdev_stats_id)33 static inline void hal_update_stats_counter_index(uint32_t *reo_queue_desc,
34 uint8_t vdev_stats_id)
35 {
36 HAL_DESC_SET_FIELD(reo_queue_desc, RX_REO_QUEUE,
37 STATISTICS_COUNTER_INDEX, vdev_stats_id);
38 }
39 #else
hal_update_stats_counter_index(uint32_t * reo_queue_desc,uint8_t vdev_stats_id)40 static inline void hal_update_stats_counter_index(uint32_t *reo_queue_desc,
41 uint8_t vdev_stats_id)
42 {
43 }
44 #endif
45
46 /* Proto-types */
47 uint32_t hal_get_reo_reg_base_offset_be(void);
48
49 int hal_reo_send_cmd_be(hal_soc_handle_t hal_soc_hdl,
50 hal_ring_handle_t hal_ring_hdl,
51 enum hal_reo_cmd_type cmd,
52 void *params);
53
54 /* REO status ring routines */
55 void
56 hal_reo_queue_stats_status_be(hal_ring_desc_t ring_desc,
57 void *st_handle,
58 hal_soc_handle_t hal_soc_hdl);
59 void
60 hal_reo_flush_queue_status_be(hal_ring_desc_t ring_desc,
61 void *st_handle,
62 hal_soc_handle_t hal_soc_hdl);
63 void
64 hal_reo_flush_cache_status_be(hal_ring_desc_t ring_desc,
65 void *st_handle,
66 hal_soc_handle_t hal_soc_hdl);
67 void
68 hal_reo_unblock_cache_status_be(hal_ring_desc_t ring_desc,
69 hal_soc_handle_t hal_soc_hdl,
70 void *st_handle);
71 void hal_reo_flush_timeout_list_status_be(hal_ring_desc_t ring_desc,
72 void *st_handle,
73 hal_soc_handle_t hal_soc_hdl);
74 void hal_reo_desc_thres_reached_status_be(hal_ring_desc_t ring_desc,
75 void *st_handle,
76 hal_soc_handle_t hal_soc_hdl);
77 void
78 hal_reo_rx_update_queue_status_be(hal_ring_desc_t ring_desc,
79 void *st_handle,
80 hal_soc_handle_t hal_soc_hdl);
81
82 /**
83 * hal_reo_init_cmd_ring_be() - Initialize descriptors of REO command SRNG
84 * with command number
85 * @hal_soc_hdl: Handle to HAL SoC structure
86 * @hal_ring_hdl: Handle to HAL SRNG structure
87 *
88 * Return: none
89 */
90 void hal_reo_init_cmd_ring_be(hal_soc_handle_t hal_soc_hdl,
91 hal_ring_handle_t hal_ring_hdl);
92 uint8_t hal_get_tlv_hdr_size_be(void);
93 #endif /* _HAL_REO_BE_H_ */
94