1 /* 2 * Copyright (c) 2021 The Linux Foundation. All rights reserved. 3 * Copyright (c) 2021 Qualcomm Innovation Center, Inc. All rights reserved. 4 * 5 * Permission to use, copy, modify, and/or distribute this software for 6 * any purpose with or without fee is hereby granted, provided that the 7 * above copyright notice and this permission notice appear in all 8 * copies. 9 * 10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL 11 * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED 12 * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE 13 * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL 14 * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR 15 * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER 16 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR 17 * PERFORMANCE OF THIS SOFTWARE. 18 */ 19 20 #if defined(KIWI_HEADERS_DEF) 21 22 #undef UMAC 23 #define WLAN_HEADERS 1 24 25 #include "beryllium_top_reg.h" 26 #include "wcss_version.h" 27 28 #define MISSING 0 29 30 #define SOC_RESET_CONTROL_OFFSET MISSING 31 #define GPIO_PIN0_OFFSET MISSING 32 #define GPIO_PIN1_OFFSET MISSING 33 #define GPIO_PIN0_CONFIG_MASK MISSING 34 #define GPIO_PIN1_CONFIG_MASK MISSING 35 #define LOCAL_SCRATCH_OFFSET 0x18 36 #define GPIO_PIN10_OFFSET MISSING 37 #define GPIO_PIN11_OFFSET MISSING 38 #define GPIO_PIN12_OFFSET MISSING 39 #define GPIO_PIN13_OFFSET MISSING 40 #define MBOX_BASE_ADDRESS MISSING 41 #define INT_STATUS_ENABLE_ERROR_LSB MISSING 42 #define INT_STATUS_ENABLE_ERROR_MASK MISSING 43 #define INT_STATUS_ENABLE_CPU_LSB MISSING 44 #define INT_STATUS_ENABLE_CPU_MASK MISSING 45 #define INT_STATUS_ENABLE_COUNTER_LSB MISSING 46 #define INT_STATUS_ENABLE_COUNTER_MASK MISSING 47 #define INT_STATUS_ENABLE_MBOX_DATA_LSB MISSING 48 #define INT_STATUS_ENABLE_MBOX_DATA_MASK MISSING 49 #define ERROR_STATUS_ENABLE_RX_UNDERFLOW_LSB MISSING 50 #define ERROR_STATUS_ENABLE_RX_UNDERFLOW_MASK MISSING 51 #define ERROR_STATUS_ENABLE_TX_OVERFLOW_LSB MISSING 52 #define ERROR_STATUS_ENABLE_TX_OVERFLOW_MASK MISSING 53 #define COUNTER_INT_STATUS_ENABLE_BIT_LSB MISSING 54 #define COUNTER_INT_STATUS_ENABLE_BIT_MASK MISSING 55 #define INT_STATUS_ENABLE_ADDRESS MISSING 56 #define CPU_INT_STATUS_ENABLE_BIT_LSB MISSING 57 #define CPU_INT_STATUS_ENABLE_BIT_MASK MISSING 58 #define HOST_INT_STATUS_ADDRESS MISSING 59 #define CPU_INT_STATUS_ADDRESS MISSING 60 #define ERROR_INT_STATUS_ADDRESS MISSING 61 #define ERROR_INT_STATUS_WAKEUP_MASK MISSING 62 #define ERROR_INT_STATUS_WAKEUP_LSB MISSING 63 #define ERROR_INT_STATUS_RX_UNDERFLOW_MASK MISSING 64 #define ERROR_INT_STATUS_RX_UNDERFLOW_LSB MISSING 65 #define ERROR_INT_STATUS_TX_OVERFLOW_MASK MISSING 66 #define ERROR_INT_STATUS_TX_OVERFLOW_LSB MISSING 67 #define COUNT_DEC_ADDRESS MISSING 68 #define HOST_INT_STATUS_CPU_MASK MISSING 69 #define HOST_INT_STATUS_CPU_LSB MISSING 70 #define HOST_INT_STATUS_ERROR_MASK MISSING 71 #define HOST_INT_STATUS_ERROR_LSB MISSING 72 #define HOST_INT_STATUS_COUNTER_MASK MISSING 73 #define HOST_INT_STATUS_COUNTER_LSB MISSING 74 #define RX_LOOKAHEAD_VALID_ADDRESS MISSING 75 #define WINDOW_DATA_ADDRESS MISSING 76 #define WINDOW_READ_ADDR_ADDRESS MISSING 77 #define WINDOW_WRITE_ADDR_ADDRESS MISSING 78 /* GPIO Register */ 79 #define GPIO_ENABLE_W1TS_LOW_ADDRESS MISSING 80 #define GPIO_PIN0_CONFIG_LSB MISSING 81 #define GPIO_PIN0_PAD_PULL_LSB MISSING 82 #define GPIO_PIN0_PAD_PULL_MASK MISSING 83 /* SI reg */ 84 #define SI_CONFIG_ERR_INT_MASK MISSING 85 #define SI_CONFIG_ERR_INT_LSB MISSING 86 87 #define RTC_SOC_BASE_ADDRESS MISSING 88 #define RTC_WMAC_BASE_ADDRESS MISSING 89 #define SOC_CORE_BASE_ADDRESS MISSING 90 #define WLAN_MAC_BASE_ADDRESS MISSING 91 #define GPIO_BASE_ADDRESS MISSING 92 #define ANALOG_INTF_BASE_ADDRESS MISSING 93 #define CE0_BASE_ADDRESS MISSING 94 #define CE1_BASE_ADDRESS MISSING 95 #define CE_COUNT 12 96 #define CE_WRAPPER_BASE_ADDRESS MISSING 97 #define SI_BASE_ADDRESS MISSING 98 #define DRAM_BASE_ADDRESS MISSING 99 100 #define WLAN_SYSTEM_SLEEP_DISABLE_LSB MISSING 101 #define WLAN_SYSTEM_SLEEP_DISABLE_MASK MISSING 102 #define CLOCK_CONTROL_OFFSET MISSING 103 #define CLOCK_CONTROL_SI0_CLK_MASK MISSING 104 #define RESET_CONTROL_SI0_RST_MASK MISSING 105 #define WLAN_RESET_CONTROL_OFFSET MISSING 106 #define WLAN_RESET_CONTROL_COLD_RST_MASK MISSING 107 #define WLAN_RESET_CONTROL_WARM_RST_MASK MISSING 108 #define CPU_CLOCK_OFFSET MISSING 109 110 #define CPU_CLOCK_STANDARD_LSB MISSING 111 #define CPU_CLOCK_STANDARD_MASK MISSING 112 #define LPO_CAL_ENABLE_LSB MISSING 113 #define LPO_CAL_ENABLE_MASK MISSING 114 #define WLAN_SYSTEM_SLEEP_OFFSET MISSING 115 116 #define SOC_CHIP_ID_ADDRESS MISSING 117 #define SOC_CHIP_ID_REVISION_MASK MISSING 118 #define SOC_CHIP_ID_REVISION_LSB MISSING 119 #define SOC_CHIP_ID_REVISION_MSB MISSING 120 121 #define FW_IND_EVENT_PENDING MISSING 122 #define FW_IND_INITIALIZED MISSING 123 124 #define MSDU_LINK_EXT_3_TCP_OVER_IPV4_CHECKSUM_EN_MASK MISSING 125 #define MSDU_LINK_EXT_3_TCP_OVER_IPV6_CHECKSUM_EN_MASK MISSING 126 #define MSDU_LINK_EXT_3_UDP_OVER_IPV4_CHECKSUM_EN_MASK MISSING 127 #define MSDU_LINK_EXT_3_UDP_OVER_IPV6_CHECKSUM_EN_MASK MISSING 128 #define MSDU_LINK_EXT_3_TCP_OVER_IPV4_CHECKSUM_EN_LSB MISSING 129 #define MSDU_LINK_EXT_3_TCP_OVER_IPV6_CHECKSUM_EN_LSB MISSING 130 #define MSDU_LINK_EXT_3_UDP_OVER_IPV4_CHECKSUM_EN_LSB MISSING 131 #define MSDU_LINK_EXT_3_UDP_OVER_IPV6_CHECKSUM_EN_LSB MISSING 132 133 #define SR_WR_INDEX_ADDRESS MISSING 134 #define DST_WATERMARK_ADDRESS MISSING 135 136 #define DST_WR_INDEX_ADDRESS MISSING 137 #define SRC_WATERMARK_ADDRESS MISSING 138 #define SRC_WATERMARK_LOW_MASK MISSING 139 #define SRC_WATERMARK_HIGH_MASK MISSING 140 #define DST_WATERMARK_LOW_MASK MISSING 141 #define DST_WATERMARK_HIGH_MASK MISSING 142 #define CURRENT_SRRI_ADDRESS MISSING 143 #define CURRENT_DRRI_ADDRESS MISSING 144 #define HOST_IS_SRC_RING_HIGH_WATERMARK_MASK MISSING 145 #define HOST_IS_SRC_RING_LOW_WATERMARK_MASK MISSING 146 #define HOST_IS_DST_RING_HIGH_WATERMARK_MASK MISSING 147 #define HOST_IS_DST_RING_LOW_WATERMARK_MASK MISSING 148 #define HOST_IS_ADDRESS MISSING 149 #define MISC_IS_ADDRESS MISSING 150 #define HOST_IS_COPY_COMPLETE_MASK MISSING 151 #define CE_WRAPPER_BASE_ADDRESS MISSING 152 #define CE_WRAPPER_INTERRUPT_SUMMARY_ADDRESS MISSING 153 #define CE_DDR_ADDRESS_FOR_RRI_LOW MISSING 154 #define CE_DDR_ADDRESS_FOR_RRI_HIGH MISSING 155 156 #if (defined(WCSS_VERSION) && (WCSS_VERSION >= 72)) 157 #define HOST_IE_ADDRESS UMAC_CE_COMMON_WFSS_CE_COMMON_R0_CE_HOST_IE_0 158 #define HOST_IE_ADDRESS_2 UMAC_CE_COMMON_WFSS_CE_COMMON_R0_CE_HOST_IE_1 159 #else /* WCSS_VERSION < 72 */ 160 #define HOST_IE_ADDRESS UMAC_CE_COMMON_CE_HOST_IE_0 161 #define HOST_IE_ADDRESS_2 UMAC_CE_COMMON_CE_HOST_IE_1 162 #endif /* WCSS_VERSION */ 163 164 #define HOST_IE_COPY_COMPLETE_MASK MISSING 165 #define SR_BA_ADDRESS MISSING 166 #define SR_BA_ADDRESS_HIGH MISSING 167 #define SR_SIZE_ADDRESS MISSING 168 #define CE_CTRL1_ADDRESS MISSING 169 #define CE_CTRL1_DMAX_LENGTH_MASK MISSING 170 #define DR_BA_ADDRESS MISSING 171 #define DR_BA_ADDRESS_HIGH MISSING 172 #define DR_SIZE_ADDRESS MISSING 173 #define CE_CMD_REGISTER MISSING 174 #define CE_MSI_ADDRESS MISSING 175 #define CE_MSI_ADDRESS_HIGH MISSING 176 #define CE_MSI_DATA MISSING 177 #define CE_MSI_ENABLE_BIT MISSING 178 #define MISC_IE_ADDRESS MISSING 179 #define MISC_IS_AXI_ERR_MASK MISSING 180 #define MISC_IS_DST_ADDR_ERR_MASK MISSING 181 #define MISC_IS_SRC_LEN_ERR_MASK MISSING 182 #define MISC_IS_DST_MAX_LEN_VIO_MASK MISSING 183 #define MISC_IS_DST_RING_OVERFLOW_MASK MISSING 184 #define MISC_IS_SRC_RING_OVERFLOW_MASK MISSING 185 #define SRC_WATERMARK_LOW_LSB MISSING 186 #define SRC_WATERMARK_HIGH_LSB MISSING 187 #define DST_WATERMARK_LOW_LSB MISSING 188 #define DST_WATERMARK_HIGH_LSB MISSING 189 #define CE_WRAPPER_INTERRUPT_SUMMARY_HOST_MSI_MASK MISSING 190 #define CE_WRAPPER_INTERRUPT_SUMMARY_HOST_MSI_LSB MISSING 191 #define CE_CTRL1_DMAX_LENGTH_LSB MISSING 192 #define CE_CTRL1_SRC_RING_BYTE_SWAP_EN_MASK MISSING 193 #define CE_CTRL1_DST_RING_BYTE_SWAP_EN_MASK MISSING 194 #define CE_CTRL1_SRC_RING_BYTE_SWAP_EN_LSB MISSING 195 #define CE_CTRL1_DST_RING_BYTE_SWAP_EN_LSB MISSING 196 #define CE_CTRL1_IDX_UPD_EN_MASK MISSING 197 #define CE_WRAPPER_DEBUG_OFFSET MISSING 198 #define CE_WRAPPER_DEBUG_SEL_MSB MISSING 199 #define CE_WRAPPER_DEBUG_SEL_LSB MISSING 200 #define CE_WRAPPER_DEBUG_SEL_MASK MISSING 201 #define CE_DEBUG_OFFSET MISSING 202 #define CE_DEBUG_SEL_MSB MISSING 203 #define CE_DEBUG_SEL_LSB MISSING 204 #define CE_DEBUG_SEL_MASK MISSING 205 #define CE0_BASE_ADDRESS MISSING 206 #define CE1_BASE_ADDRESS MISSING 207 #define A_WIFI_APB_3_A_WCMN_APPS_CE_INTR_ENABLES MISSING 208 #define A_WIFI_APB_3_A_WCMN_APPS_CE_INTR_STATUS MISSING 209 210 #define KIWI_BOARD_DATA_SZ MISSING 211 #define KIWI_BOARD_EXT_DATA_SZ MISSING 212 213 #define MY_TARGET_DEF KIWI_TARGETdef 214 #define MY_HOST_DEF KIWI_HOSTdef 215 #define MY_CEREG_DEF KIWI_CE_TARGETdef 216 #define MY_TARGET_BOARD_DATA_SZ KIWI_BOARD_DATA_SZ 217 #define MY_TARGET_BOARD_EXT_DATA_SZ KIWI_BOARD_EXT_DATA_SZ 218 #include "targetdef.h" 219 #include "hostdef.h" 220 #else 221 #include "common_drv.h" 222 #include "targetdef.h" 223 #include "hostdef.h" 224 struct targetdef_s *KIWI_TARGETdef; 225 struct hostdef_s *KIWI_HOSTdef; 226 #endif /*KIWI_HEADERS_DEF */ 227