1 /* 2 * Intel MIC Platform Software Stack (MPSS) 3 * 4 * Copyright(c) 2013 Intel Corporation. 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License, version 2, as 8 * published by the Free Software Foundation. 9 * 10 * This program is distributed in the hope that it will be useful, but 11 * WITHOUT ANY WARRANTY; without even the implied warranty of 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 13 * General Public License for more details. 14 * 15 * The full GNU General Public License is included in this distribution in 16 * the file called "COPYING". 17 * 18 * Intel MIC Host driver. 19 * 20 */ 21 #ifndef _MIC_X100_HW_H_ 22 #define _MIC_X100_HW_H_ 23 24 #define MIC_X100_PCI_DEVICE_2250 0x2250 25 #define MIC_X100_PCI_DEVICE_2251 0x2251 26 #define MIC_X100_PCI_DEVICE_2252 0x2252 27 #define MIC_X100_PCI_DEVICE_2253 0x2253 28 #define MIC_X100_PCI_DEVICE_2254 0x2254 29 #define MIC_X100_PCI_DEVICE_2255 0x2255 30 #define MIC_X100_PCI_DEVICE_2256 0x2256 31 #define MIC_X100_PCI_DEVICE_2257 0x2257 32 #define MIC_X100_PCI_DEVICE_2258 0x2258 33 #define MIC_X100_PCI_DEVICE_2259 0x2259 34 #define MIC_X100_PCI_DEVICE_225a 0x225a 35 #define MIC_X100_PCI_DEVICE_225b 0x225b 36 #define MIC_X100_PCI_DEVICE_225c 0x225c 37 #define MIC_X100_PCI_DEVICE_225d 0x225d 38 #define MIC_X100_PCI_DEVICE_225e 0x225e 39 40 #define MIC_X100_APER_BAR 0 41 #define MIC_X100_MMIO_BAR 4 42 43 #define MIC_X100_SBOX_BASE_ADDRESS 0x00010000 44 #define MIC_X100_SBOX_SPAD0 0x0000AB20 45 #define MIC_X100_SBOX_SICR0_DBR(x) ((x) & 0xf) 46 #define MIC_X100_SBOX_SICR0_DMA(x) (((x) >> 8) & 0xff) 47 #define MIC_X100_SBOX_SICE0_DBR(x) ((x) & 0xf) 48 #define MIC_X100_SBOX_DBR_BITS(x) ((x) & 0xf) 49 #define MIC_X100_SBOX_SICE0_DMA(x) (((x) >> 8) & 0xff) 50 #define MIC_X100_SBOX_DMA_BITS(x) (((x) & 0xff) << 8) 51 52 #define MIC_X100_SBOX_APICICR0 0x0000A9D0 53 #define MIC_X100_SBOX_SICR0 0x00009004 54 #define MIC_X100_SBOX_SICE0 0x0000900C 55 #define MIC_X100_SBOX_SICC0 0x00009010 56 #define MIC_X100_SBOX_SIAC0 0x00009014 57 #define MIC_X100_SBOX_MSIXPBACR 0x00009084 58 #define MIC_X100_SBOX_MXAR0 0x00009044 59 #define MIC_X100_SBOX_SMPT00 0x00003100 60 #define MIC_X100_SBOX_RDMASR0 0x0000B180 61 62 #define MIC_X100_DOORBELL_IDX_START 0 63 #define MIC_X100_NUM_DOORBELL 4 64 #define MIC_X100_DMA_IDX_START 8 65 #define MIC_X100_NUM_DMA 8 66 #define MIC_X100_ERR_IDX_START 30 67 #define MIC_X100_NUM_ERR 1 68 69 #define MIC_X100_NUM_SBOX_IRQ 8 70 #define MIC_X100_NUM_RDMASR_IRQ 8 71 #define MIC_X100_RDMASR_IRQ_BASE 17 72 #define MIC_X100_SPAD2_DOWNLOAD_STATUS(x) ((x) & 0x1) 73 #define MIC_X100_SPAD2_APIC_ID(x) (((x) >> 1) & 0x1ff) 74 #define MIC_X100_SPAD2_DOWNLOAD_ADDR(x) ((x) & 0xfffff000) 75 #define MIC_X100_SBOX_APICICR7 0x0000AA08 76 #define MIC_X100_SBOX_RGCR 0x00004010 77 #define MIC_X100_SBOX_SDBIC0 0x0000CC90 78 #define MIC_X100_DOWNLOAD_INFO 2 79 #define MIC_X100_FW_SIZE 5 80 #define MIC_X100_POSTCODE 0x242c 81 82 static const u16 mic_x100_intr_init[] = { 83 MIC_X100_DOORBELL_IDX_START, 84 MIC_X100_DMA_IDX_START, 85 MIC_X100_ERR_IDX_START, 86 MIC_X100_NUM_DOORBELL, 87 MIC_X100_NUM_DMA, 88 MIC_X100_NUM_ERR, 89 }; 90 91 /* Host->Card(bootstrap) Interrupt Vector */ 92 #define MIC_X100_BSP_INTERRUPT_VECTOR 229 93 94 extern struct mic_hw_ops mic_x100_ops; 95 extern struct mic_smpt_ops mic_x100_smpt_ops; 96 extern struct mic_hw_intr_ops mic_x100_intr_ops; 97 98 #endif 99